From 1f74ec3535dba67d3e71ab1b9bf509c86bdca560 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marcelina=20Ko=C5=9Bcielnicka?= Date: Sat, 29 May 2021 17:45:05 +0200 Subject: memory_share: Add -nosat and -nowiden options. This unlocks wide port recognition by default. --- passes/memory/memory.cc | 15 ++++++++++++--- passes/memory/memory_share.cc | 36 +++++++++++++++++++++++++++++------- 2 files changed, 41 insertions(+), 10 deletions(-) (limited to 'passes/memory') diff --git a/passes/memory/memory.cc b/passes/memory/memory.cc index a4751cb61..bc1b19d00 100644 --- a/passes/memory/memory.cc +++ b/passes/memory/memory.cc @@ -31,7 +31,7 @@ struct MemoryPass : public Pass { { // |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---| log("\n"); - log(" memory [-nomap] [-nordff] [-memx] [-bram ] [selection]\n"); + log(" memory [-nomap] [-nordff] [-nowiden] [-nosat] [-memx] [-bram ] [selection]\n"); log("\n"); log("This pass calls all the other memory_* passes in a useful order:\n"); log("\n"); @@ -40,7 +40,7 @@ struct MemoryPass : public Pass { log(" opt_mem_feedback\n"); log(" memory_dff (skipped if called with -nordff or -memx)\n"); log(" opt_clean\n"); - log(" memory_share\n"); + log(" memory_share [-nowiden] [-nosat]\n"); log(" memory_memx (when called with -memx)\n"); log(" opt_clean\n"); log(" memory_collect\n"); @@ -57,6 +57,7 @@ struct MemoryPass : public Pass { bool flag_nordff = false; bool flag_memx = false; string memory_bram_opts; + string memory_share_opts; log_header(design, "Executing MEMORY pass.\n"); log_push(); @@ -76,6 +77,14 @@ struct MemoryPass : public Pass { flag_memx = true; continue; } + if (args[argidx] == "-nowiden") { + memory_share_opts += " -nowiden"; + continue; + } + if (args[argidx] == "-nosat") { + memory_share_opts += " -nosat"; + continue; + } if (argidx+1 < args.size() && args[argidx] == "-bram") { memory_bram_opts += " -rules " + args[++argidx]; continue; @@ -90,7 +99,7 @@ struct MemoryPass : public Pass { if (!flag_nordff) Pass::call(design, "memory_dff"); Pass::call(design, "opt_clean"); - Pass::call(design, "memory_share"); + Pass::call(design, "memory_share" + memory_share_opts); if (flag_memx) Pass::call(design, "memory_memx"); Pass::call(design, "opt_clean"); diff --git a/passes/memory/memory_share.cc b/passes/memory/memory_share.cc index 1951b5400..9d82739aa 100644 --- a/passes/memory/memory_share.cc +++ b/passes/memory/memory_share.cc @@ -35,7 +35,7 @@ struct MemoryShareWorker ModWalker modwalker; FfInitVals initvals; bool flag_widen; - + bool flag_sat; // -------------------------------------------------- // Consolidate read ports that read the same address @@ -452,7 +452,7 @@ struct MemoryShareWorker // Setup and run // ------------- - MemoryShareWorker(RTLIL::Design *design, bool flag_widen) : design(design), modwalker(design), flag_widen(flag_widen) {} + MemoryShareWorker(RTLIL::Design *design, bool flag_widen, bool flag_sat) : design(design), modwalker(design), flag_widen(flag_widen), flag_sat(flag_sat) {} void operator()(RTLIL::Module* module) { @@ -482,6 +482,9 @@ struct MemoryShareWorker while (consolidate_wr_by_addr(mem)); } + if (!flag_sat) + return; + modwalker.setup(module); for (auto &mem : memories) @@ -495,7 +498,7 @@ struct MemorySharePass : public Pass { { // |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---| log("\n"); - log(" memory_share [selection]\n"); + log(" memory_share [-nosat] [-nowiden] [selection]\n"); log("\n"); log("This pass merges share-able memory ports into single memory ports.\n"); log("\n"); @@ -504,9 +507,13 @@ struct MemorySharePass : public Pass { log(" - When multiple write ports access the same address then this is converted\n"); log(" to a single write port with a more complex data and/or enable logic path.\n"); log("\n"); + log(" - When multiple read or write ports access adjacent aligned addresses, they are\n"); + log(" merged to a single wide read or write port. This transformation can be\n"); + log(" disabled with the \"-nowiden\" option.\n"); + log("\n"); log(" - When multiple write ports are never accessed at the same time (a SAT\n"); log(" solver is used to determine this), then the ports are merged into a single\n"); - log(" write port.\n"); + log(" write port. This transformation can be disabled with the \"-nosat\" option.\n"); log("\n"); log("Note that in addition to the algorithms implemented in this pass, the $memrd\n"); log("and $memwr cells are also subject to generic resource sharing passes (and other\n"); @@ -514,11 +521,26 @@ struct MemorySharePass : public Pass { log("\n"); } void execute(std::vector args, RTLIL::Design *design) override { + bool flag_widen = true; + bool flag_sat = true; log_header(design, "Executing MEMORY_SHARE pass (consolidating $memrd/$memwr cells).\n"); - // TODO: expose when wide ports are actually supported. - bool flag_widen = false; + size_t argidx; + for (argidx = 1; argidx < args.size(); argidx++) + { + if (args[argidx] == "-nosat") + { + flag_sat = false; + continue; + } + if (args[argidx] == "-nowiden") + { + flag_widen = false; + continue; + } + break; + } extra_args(args, 1, design); - MemoryShareWorker msw(design, flag_widen); + MemoryShareWorker msw(design, flag_widen, flag_sat); for (auto module : design->selected_modules()) msw(module); -- cgit v1.2.3