From 10e5791c5e5660cb784503d36439ee90d61eb06b Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Sun, 27 Jul 2014 10:18:00 +0200 Subject: Refactoring: Renamed RTLIL::Design::modules to modules_ --- passes/cmds/scc.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'passes/cmds/scc.cc') diff --git a/passes/cmds/scc.cc b/passes/cmds/scc.cc index c95043417..1fa1b4c9c 100644 --- a/passes/cmds/scc.cc +++ b/passes/cmds/scc.cc @@ -280,7 +280,7 @@ struct SccPass : public Pass { RTLIL::Selection newSelection(false); - for (auto &mod_it : design->modules) + for (auto &mod_it : design->modules_) if (design->selected(mod_it.second)) { SccWorker worker(design, mod_it.second, allCellTypes, maxDepth); -- cgit v1.2.3