From 4d0ba9b3b27d507ba032bdc1a4bcbf63e2581336 Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Mon, 27 Jul 2015 09:54:58 +0200 Subject: Fixed "check" command for inout ports --- passes/cmds/check.cc | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) (limited to 'passes/cmds/check.cc') diff --git a/passes/cmds/check.cc b/passes/cmds/check.cc index 057812430..fe74408d4 100644 --- a/passes/cmds/check.cc +++ b/passes/cmds/check.cc @@ -79,6 +79,7 @@ struct CheckPass : public Pass { SigMap sigmap(module); dict> wire_drivers; + dict wire_drivers_count; pool used_wires; TopoSort topo; @@ -99,9 +100,13 @@ struct CheckPass : public Pass { if (logic_cell) topo.edge(stringf("cell %s (%s)", log_id(cell), log_id(cell->type)), stringf("wire %s", log_signal(sig[i]))); - wire_drivers[sig[i]].push_back(stringf("port %s[%d] of cell %s (%s)", - log_id(conn.first), i, log_id(cell), log_id(cell->type))); + if (sig[i].wire) + wire_drivers[sig[i]].push_back(stringf("port %s[%d] of cell %s (%s)", + log_id(conn.first), i, log_id(cell), log_id(cell->type))); } + if (!cell->input(conn.first) && cell->output(conn.first)) + for (auto bit : sig) + if (bit.wire) wire_drivers_count[bit]++; } for (auto wire : module->wires()) { @@ -113,6 +118,9 @@ struct CheckPass : public Pass { if (wire->port_output) for (auto bit : sigmap(wire)) if (bit.wire) used_wires.insert(bit); + if (wire->port_input && !wire->port_output) + for (auto bit : sigmap(wire)) + if (bit.wire) wire_drivers_count[bit]++; if (noinit && wire->attributes.count("\\init")) { log_warning("Wire %s.%s has an unprocessed 'init' attribute.\n", log_id(module), log_id(wire)); counter++; @@ -120,7 +128,7 @@ struct CheckPass : public Pass { } for (auto it : wire_drivers) - if (GetSize(it.second) > 1) { + if (wire_drivers_count[it.first] > 1) { string message = stringf("multiple conflicting drivers for %s.%s:\n", log_id(module), log_signal(it.first)); for (auto str : it.second) message += stringf(" %s\n", str.c_str()); -- cgit v1.2.3