From 6f4f795953b2a38ec77984c7e1b50f579b59272e Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Wed, 15 Apr 2020 12:15:36 -0700 Subject: aiger/xaiger: use odd for negedge clk, even for posedge Since abc9 doesn't like negative mergeability values --- frontends/aiger/aigerparse.cc | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) (limited to 'frontends/aiger') diff --git a/frontends/aiger/aigerparse.cc b/frontends/aiger/aigerparse.cc index ed3a926c6..16e94c394 100644 --- a/frontends/aiger/aigerparse.cc +++ b/frontends/aiger/aigerparse.cc @@ -789,13 +789,12 @@ void AigerReader::post_process() Cell* ff; int clock_index = mergeability[i]; - if (clock_index < 0) { + if (clock_index & 1) { ff = module->addCell(NEW_ID, ID($_DFF_N_)); - clock_index = -clock_index; + clock_index--; } - else if (clock_index > 0) + else ff = module->addCell(NEW_ID, ID($_DFF_P_)); - else log_abort(); auto r = mergeability_to_clock.insert(clock_index); if (r.second) r.first->second = module->addWire(NEW_ID); -- cgit v1.2.3