From 0bc95f1e049afc35bb5ea30663b0a5725dfbf584 Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Thu, 21 Apr 2016 23:28:37 +0200 Subject: Added "yosys -D" feature --- backends/blif/blif.cc | 2 +- backends/btor/btor.cc | 2 +- backends/edif/edif.cc | 2 +- backends/ilang/ilang_backend.cc | 2 +- backends/intersynth/intersynth.cc | 4 ++-- backends/json/json.cc | 2 +- backends/smt2/smt2.cc | 2 +- backends/smv/smv.cc | 2 +- backends/spice/spice.cc | 2 +- backends/verilog/verilog_backend.cc | 2 +- 10 files changed, 11 insertions(+), 11 deletions(-) (limited to 'backends') diff --git a/backends/blif/blif.cc b/backends/blif/blif.cc index 14b8b372e..f9de87d9f 100644 --- a/backends/blif/blif.cc +++ b/backends/blif/blif.cc @@ -448,7 +448,7 @@ struct BlifBackend : public Backend { std::string false_type, false_out; BlifDumperConfig config; - log_header("Executing BLIF backend.\n"); + log_header(design, "Executing BLIF backend.\n"); size_t argidx; for (argidx = 1; argidx < args.size(); argidx++) diff --git a/backends/btor/btor.cc b/backends/btor/btor.cc index 465723f1a..bbe90e85f 100644 --- a/backends/btor/btor.cc +++ b/backends/btor/btor.cc @@ -1065,7 +1065,7 @@ struct BtorBackend : public Backend { std::string false_type, false_out; BtorDumperConfig config; - log_header("Executing BTOR backend.\n"); + log_header(design, "Executing BTOR backend.\n"); size_t argidx=1; extra_args(f, filename, args, argidx); diff --git a/backends/edif/edif.cc b/backends/edif/edif.cc index 72bf07f53..d16f18316 100644 --- a/backends/edif/edif.cc +++ b/backends/edif/edif.cc @@ -113,7 +113,7 @@ struct EdifBackend : public Backend { } virtual void execute(std::ostream *&f, std::string filename, std::vector args, RTLIL::Design *design) { - log_header("Executing EDIF backend.\n"); + log_header(design, "Executing EDIF backend.\n"); std::string top_module_name; std::map> lib_cell_ports; diff --git a/backends/ilang/ilang_backend.cc b/backends/ilang/ilang_backend.cc index adabf05ec..03e29c524 100644 --- a/backends/ilang/ilang_backend.cc +++ b/backends/ilang/ilang_backend.cc @@ -391,7 +391,7 @@ struct IlangBackend : public Backend { { bool selected = false; - log_header("Executing ILANG backend.\n"); + log_header(design, "Executing ILANG backend.\n"); size_t argidx; for (argidx = 1; argidx < args.size(); argidx++) { diff --git a/backends/intersynth/intersynth.cc b/backends/intersynth/intersynth.cc index 72a70e380..34cb52fb4 100644 --- a/backends/intersynth/intersynth.cc +++ b/backends/intersynth/intersynth.cc @@ -73,7 +73,7 @@ struct IntersynthBackend : public Backend { } virtual void execute(std::ostream *&f, std::string filename, std::vector args, RTLIL::Design *design) { - log_header("Executing INTERSYNTH backend.\n"); + log_header(design, "Executing INTERSYNTH backend.\n"); log_push(); std::vector libfiles; @@ -113,7 +113,7 @@ struct IntersynthBackend : public Backend { } if (libs.size() > 0) - log_header("Continuing INTERSYNTH backend.\n"); + log_header(design, "Continuing INTERSYNTH backend.\n"); std::set conntypes_code, celltypes_code; std::string netlists_code; diff --git a/backends/json/json.cc b/backends/json/json.cc index 7d5ee58e8..05530ee69 100644 --- a/backends/json/json.cc +++ b/backends/json/json.cc @@ -463,7 +463,7 @@ struct JsonBackend : public Backend { } extra_args(f, filename, args, argidx); - log_header("Executing JSON backend.\n"); + log_header(design, "Executing JSON backend.\n"); JsonWriter json_writer(*f, false, aig_mode); json_writer.write_design(design); diff --git a/backends/smt2/smt2.cc b/backends/smt2/smt2.cc index c852921ee..e869f78cd 100644 --- a/backends/smt2/smt2.cc +++ b/backends/smt2/smt2.cc @@ -758,7 +758,7 @@ struct Smt2Backend : public Backend { std::ifstream template_f; bool bvmode = false, memmode = false, regsmode = false, wiresmode = false, verbose = false; - log_header("Executing SMT2 backend.\n"); + log_header(design, "Executing SMT2 backend.\n"); size_t argidx; for (argidx = 1; argidx < args.size(); argidx++) diff --git a/backends/smv/smv.cc b/backends/smv/smv.cc index b29a88ac2..162ce4906 100644 --- a/backends/smv/smv.cc +++ b/backends/smv/smv.cc @@ -694,7 +694,7 @@ struct SmvBackend : public Backend { std::ifstream template_f; bool verbose = false; - log_header("Executing SMV backend.\n"); + log_header(design, "Executing SMV backend.\n"); size_t argidx; for (argidx = 1; argidx < args.size(); argidx++) diff --git a/backends/spice/spice.cc b/backends/spice/spice.cc index bd54f16b9..4b88a3909 100644 --- a/backends/spice/spice.cc +++ b/backends/spice/spice.cc @@ -168,7 +168,7 @@ struct SpiceBackend : public Backend { bool big_endian = false, use_inames = false; std::string neg = "Vss", pos = "Vdd", ncpf = "_NC"; - log_header("Executing SPICE backend.\n"); + log_header(design, "Executing SPICE backend.\n"); size_t argidx; for (argidx = 1; argidx < args.size(); argidx++) diff --git a/backends/verilog/verilog_backend.cc b/backends/verilog/verilog_backend.cc index 2d2b4bcfa..c5c6b5a08 100644 --- a/backends/verilog/verilog_backend.cc +++ b/backends/verilog/verilog_backend.cc @@ -1363,7 +1363,7 @@ struct VerilogBackend : public Backend { } virtual void execute(std::ostream *&f, std::string filename, std::vector args, RTLIL::Design *design) { - log_header("Executing Verilog backend.\n"); + log_header(design, "Executing Verilog backend.\n"); norename = false; noattr = false; -- cgit v1.2.3 From 60ac1bd178eef96b5cc34091dca7552cc3cad70f Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Fri, 22 Apr 2016 18:00:46 +0200 Subject: Added support for "active high" and "active low" latches in BLIF back-end --- backends/blif/blif.cc | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'backends') diff --git a/backends/blif/blif.cc b/backends/blif/blif.cc index f9de87d9f..27f08ea1a 100644 --- a/backends/blif/blif.cc +++ b/backends/blif/blif.cc @@ -317,6 +317,18 @@ struct BlifDumper continue; } + if (!config->icells_mode && cell->type == "$_DLATCH_N_") { + f << stringf(".latch %s %s al %s%s\n", cstr(cell->getPort("\\D")), cstr(cell->getPort("\\Q")), + cstr(cell->getPort("\\E")), cstr_init(cell->getPort("\\Q"))); + continue; + } + + if (!config->icells_mode && cell->type == "$_DLATCH_P_") { + f << stringf(".latch %s %s ah %s%s\n", cstr(cell->getPort("\\D")), cstr(cell->getPort("\\Q")), + cstr(cell->getPort("\\E")), cstr_init(cell->getPort("\\Q"))); + continue; + } + if (!config->icells_mode && cell->type == "$lut") { f << stringf(".names"); auto &inputs = cell->getPort("\\A"); -- cgit v1.2.3