From 3b85b7c57a071279275f27d5547a5ad4ad2e1a44 Mon Sep 17 00:00:00 2001 From: David Shah Date: Tue, 14 Apr 2020 20:39:13 +0100 Subject: cxxrtl: Fix handling of unclocked memory read ports Signed-off-by: David Shah --- backends/cxxrtl/cxxrtl.cc | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'backends') diff --git a/backends/cxxrtl/cxxrtl.cc b/backends/cxxrtl/cxxrtl.cc index 3263f03fd..d1a855bf0 100644 --- a/backends/cxxrtl/cxxrtl.cc +++ b/backends/cxxrtl/cxxrtl.cc @@ -871,7 +871,8 @@ struct CxxrtlWorker { dump_sigspec_rhs(cell->getPort(ID(ADDR))); f << ", " << memory->start_offset << ", " << memory->size << ");\n"; if (cell->type == ID($memrd)) { - if (!cell->getPort(ID(EN)).is_fully_ones()) { + bool has_enable = cell->getParam(ID(CLK_ENABLE)).as_bool() && !cell->getPort(ID(EN)).is_fully_ones(); + if (has_enable) { f << indent << "if ("; dump_sigspec_rhs(cell->getPort(ID(EN))); f << ") {\n"; @@ -930,7 +931,7 @@ struct CxxrtlWorker { f << " = value<" << memory->width << "> {};\n"; dec_indent(); f << indent << "}\n"; - if (!cell->getPort(ID(EN)).is_fully_ones()) { + if (has_enable) { dec_indent(); f << indent << "}\n"; } -- cgit v1.2.3