From 0d0bf9c4a2acd70418670518bf641f7628c92165 Mon Sep 17 00:00:00 2001
From: whitequark <whitequark@whitequark.org>
Date: Tue, 14 Apr 2020 12:34:35 +0000
Subject: write_cxxrtl: ignore disconnected module ports.

E.g. port `q` in `submod x(.p(p), .q());`.

Fixes #1920.
---
 backends/cxxrtl/cxxrtl.cc | 2 ++
 1 file changed, 2 insertions(+)

(limited to 'backends/cxxrtl')

diff --git a/backends/cxxrtl/cxxrtl.cc b/backends/cxxrtl/cxxrtl.cc
index 465882858..6038f87b1 100644
--- a/backends/cxxrtl/cxxrtl.cc
+++ b/backends/cxxrtl/cxxrtl.cc
@@ -970,6 +970,8 @@ struct CxxrtlWorker {
 						continue;
 				}
 				if (cell->output(conn.first)) {
+					if (conn.second.empty())
+						continue; // ignore disconnected ports
 					f << indent;
 					dump_sigspec_lhs(conn.second);
 					f << " = " << mangle(cell) << "." << mangle_wire_name(conn.first) << ".curr;\n";
-- 
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