From b8624ad2aef941776f5b4a08f66f8d43e70f8467 Mon Sep 17 00:00:00 2001
From: Miodrag Milanovic <mmicko@gmail.com>
Date: Mon, 25 Oct 2021 09:04:43 +0200
Subject: Compile option for enabling async load verific support

---
 Makefile | 4 ++++
 1 file changed, 4 insertions(+)

(limited to 'Makefile')

diff --git a/Makefile b/Makefile
index 951587aa3..9d806f438 100644
--- a/Makefile
+++ b/Makefile
@@ -20,6 +20,7 @@ ENABLE_GHDL := 0
 ENABLE_VERIFIC := 0
 DISABLE_VERIFIC_EXTENSIONS := 0
 DISABLE_VERIFIC_VHDL := 0
+ENABLE_VERIFIC_ASYNC_LOAD := 0
 ENABLE_COVER := 1
 ENABLE_LIBYOSYS := 0
 ENABLE_PROTOBUF := 0
@@ -501,6 +502,9 @@ endif
 ifeq ($(ENABLE_VERIFIC),1)
 VERIFIC_DIR ?= /usr/local/src/verific_lib
 VERIFIC_COMPONENTS ?= verilog database util containers hier_tree
+ifeq ($(ENABLE_VERIFIC_ASYNC_LOAD),1)
+CXXFLAGS += -DVERIFIC_ASYNC_LOAD
+endif
 ifneq ($(DISABLE_VERIFIC_VHDL),1)
 VERIFIC_COMPONENTS += vhdl
 CXXFLAGS += -DVERIFIC_VHDL_SUPPORT
-- 
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