From a650d9079fa4732a6d118f2764d5abc2522a6b37 Mon Sep 17 00:00:00 2001
From: Zachary Snow <zach@zachjs.com>
Date: Mon, 30 May 2022 16:45:39 -0400
Subject: verilog: fix width/sign detection for functions

---
 CHANGELOG | 2 ++
 1 file changed, 2 insertions(+)

(limited to 'CHANGELOG')

diff --git a/CHANGELOG b/CHANGELOG
index 4ee364a57..60e53aa6c 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -14,6 +14,8 @@ Yosys 0.17 .. Yosys 0.17-dev
       the remaining cases
     - Fixed size and signedness computation for expressions containing array
       querying functions
+    - Fixed size and signedness computation of functions used in ternary
+      expressions or case item expressions
 
 Yosys 0.16 .. Yosys 0.17
 --------------------------
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