From dea36d4366109441e84e2e84afcfd8eb0223c902 Mon Sep 17 00:00:00 2001
From: Eddie Hung <eddie@fpgeh.com>
Date: Fri, 31 May 2019 18:10:25 -0700
Subject: Techmap flops before ABC again
---
techlibs/xilinx/synth_xilinx.cc | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/techlibs/xilinx/synth_xilinx.cc b/techlibs/xilinx/synth_xilinx.cc
index cc667b919..97464ffe4 100644
--- a/techlibs/xilinx/synth_xilinx.cc
+++ b/techlibs/xilinx/synth_xilinx.cc
@@ -282,7 +282,9 @@ struct SynthXilinxPass : public ScriptPass
}
if (check_label("map_cells")) {
- run("techmap -map +/techmap.v -map +/xilinx/cells_map.v");
+ run("techmap -map +/techmap.v -map +/xilinx/cells_map.v -map +/xilinx/ff_map.v ");
+ run("dffinit -ff FDRE Q INIT -ff FDCE Q INIT -ff FDPE Q INIT -ff FDSE Q INIT "
+ "-ff FDRE_1 Q INIT -ff FDCE_1 Q INIT -ff FDPE_1 Q INIT -ff FDSE_1 Q INIT");
run("clean");
}
@@ -299,9 +301,7 @@ struct SynthXilinxPass : public ScriptPass
// has performed any necessary retiming
if (!nosrl || help_mode)
run("shregmap -minlen 3 -init -params -enpol any_or_none", "(skip if '-nosrl')");
- run("techmap -map +/xilinx/lut_map.v -map +/xilinx/ff_map.v -map +/xilinx/cells_map.v");
- run("dffinit -ff FDRE Q INIT -ff FDCE Q INIT -ff FDPE Q INIT -ff FDSE Q INIT "
- "-ff FDRE_1 Q INIT -ff FDCE_1 Q INIT -ff FDPE_1 Q INIT -ff FDSE_1 Q INIT");
+ run("techmap -map +/xilinx/lut_map.v -map +/xilinx/cells_map.v");
run("clean");
}
--
cgit v1.2.3