From bb4164481d8b6eeec6bbc6f5b36f1286ada51eb5 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Mon, 11 Feb 2019 11:51:44 -0800 Subject: Do not ignore newline after AND in binary AIG --- frontends/aiger/aigerparse.cc | 1 - 1 file changed, 1 deletion(-) diff --git a/frontends/aiger/aigerparse.cc b/frontends/aiger/aigerparse.cc index c45de8531..ed91b6990 100644 --- a/frontends/aiger/aigerparse.cc +++ b/frontends/aiger/aigerparse.cc @@ -242,7 +242,6 @@ void AigerReader::parse_aiger_ascii() and_cell->setPort("\\B", i2_wire); and_cell->setPort("\\Y", o_wire); } - std::getline(f, line); // Ignore up to start of next line } static unsigned parse_next_delta_literal(std::istream &f, unsigned ref) -- cgit v1.2.3 From 727ba52504c65be1fcda9b03f6c2e1498e10061d Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Mon, 11 Feb 2019 13:24:21 -0800 Subject: No increment line_count for binary ANDs --- frontends/aiger/aigerparse.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/frontends/aiger/aigerparse.cc b/frontends/aiger/aigerparse.cc index ed91b6990..096e269b2 100644 --- a/frontends/aiger/aigerparse.cc +++ b/frontends/aiger/aigerparse.cc @@ -227,7 +227,7 @@ void AigerReader::parse_aiger_ascii() std::getline(f, line); // Ignore up to start of next line // Parse AND - for (unsigned i = 0; i < A; ++i, ++line_count) { + for (unsigned i = 0; i < A; ++i) { if (!(f >> l1 >> l2 >> l3)) log_error("Line %u cannot be interpreted as an AND!\n", line_count); -- cgit v1.2.3 From 04c580fde7a0d1d50c2d93bb6661b3f17a7d61a9 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Mon, 11 Feb 2019 13:28:00 -0800 Subject: Do not break for constraints --- frontends/aiger/aigerparse.cc | 1 - 1 file changed, 1 deletion(-) diff --git a/frontends/aiger/aigerparse.cc b/frontends/aiger/aigerparse.cc index 096e269b2..1e13e1124 100644 --- a/frontends/aiger/aigerparse.cc +++ b/frontends/aiger/aigerparse.cc @@ -102,7 +102,6 @@ void AigerReader::parse_aiger() if (f.peek() == '\n') break; // Else constraint (TODO) - break; } else log_error("Line %u: cannot interpret first character '%c'!\n", line_count, c); -- cgit v1.2.3 From a2ae39381124ccfec348293c7c7926597c26a5b8 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Tue, 12 Feb 2019 09:21:15 -0800 Subject: Use module->add{Not,And}Gate() functions --- frontends/aiger/aigerparse.cc | 10 ++-------- 1 file changed, 2 insertions(+), 8 deletions(-) diff --git a/frontends/aiger/aigerparse.cc b/frontends/aiger/aigerparse.cc index c45de8531..888a4afe6 100644 --- a/frontends/aiger/aigerparse.cc +++ b/frontends/aiger/aigerparse.cc @@ -134,9 +134,7 @@ static RTLIL::Wire* createWireIfNotExists(RTLIL::Module *module, unsigned litera } log_debug("Creating %s = ~%s\n", wire_name.c_str(), wire_inv_name.c_str()); - RTLIL::Cell *inv = module->addCell(stringf("\\n%d_not", variable), "$_NOT_"); // FIXME: is "_not" the right suffix? - inv->setPort("\\A", wire_inv); - inv->setPort("\\Y", wire); + module->addNotGate(stringf("\\n%d_not", variable), wire_inv, wire); // FIXME: is "_not" the right suffix? return wire; } @@ -236,11 +234,7 @@ void AigerReader::parse_aiger_ascii() RTLIL::Wire *o_wire = createWireIfNotExists(module, l1); RTLIL::Wire *i1_wire = createWireIfNotExists(module, l2); RTLIL::Wire *i2_wire = createWireIfNotExists(module, l3); - - RTLIL::Cell *and_cell = module->addCell(NEW_ID, "$_AND_"); - and_cell->setPort("\\A", i1_wire); - and_cell->setPort("\\B", i2_wire); - and_cell->setPort("\\Y", o_wire); + module->addAndGate(NEW_ID, i1_wire, i2_wire, o_wire); } std::getline(f, line); // Ignore up to start of next line } -- cgit v1.2.3 From c23e3f07517d4818d9ab1b532250353492cf50c2 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Tue, 12 Feb 2019 09:24:13 -0800 Subject: Missing headers for Xcode? --- passes/techmap/abc.cc | 2 ++ 1 file changed, 2 insertions(+) diff --git a/passes/techmap/abc.cc b/passes/techmap/abc.cc index d2d15a4a9..b215b1ea4 100644 --- a/passes/techmap/abc.cc +++ b/passes/techmap/abc.cc @@ -52,6 +52,8 @@ #include #include #include +#include +#include #ifndef _WIN32 # include -- cgit v1.2.3 From 430a7548bca6046c812f713877253f8c3d81d805 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Sun, 17 Feb 2019 11:50:55 -0800 Subject: One more merge conflict --- tests/tools/autotest.sh | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/tests/tools/autotest.sh b/tests/tools/autotest.sh index 2722cba19..b5abc3570 100755 --- a/tests/tools/autotest.sh +++ b/tests/tools/autotest.sh @@ -134,18 +134,13 @@ do fn=$(basename $fn) bn=$(basename $bn) -<<<<<<< HEAD + rm -f ${bn}_ref.fir if [[ "$ext" == "v" ]]; then egrep -v '^\s*`timescale' ../$fn > ${bn}_ref.${ext} else "$toolsdir"/../../yosys -f "$frontend $include_opts" -b "verilog" -o ${bn}_ref.v ../${fn} frontend="verilog" fi -======= - rm -f ${bn}_ref.fir - - egrep -v '^\s*`timescale' ../$fn > ${bn}_ref.v ->>>>>>> e45f62b0c56717a23099425f078d1e56212aa632 if [ ! -f ../${bn}_tb.v ]; then "$toolsdir"/../../yosys -f "$frontend $include_opts" -b "test_autotb $autotb_opts" -o ${bn}_tb.v ${bn}_ref.v -- cgit v1.2.3 From 9268a271fb8b22b089927d63f0b36d620e19704c Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Sun, 17 Feb 2019 12:07:14 -0800 Subject: read_aiger to ignore line after ands for ascii, not binary --- frontends/aiger/aigerparse.cc | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/frontends/aiger/aigerparse.cc b/frontends/aiger/aigerparse.cc index 7df28fe87..a1a0a08a0 100644 --- a/frontends/aiger/aigerparse.cc +++ b/frontends/aiger/aigerparse.cc @@ -235,6 +235,7 @@ void AigerReader::parse_aiger_ascii() RTLIL::Wire *i2_wire = createWireIfNotExists(module, l3); module->addAndGate(NEW_ID, i1_wire, i2_wire, o_wire); } + std::getline(f, line); // Ignore up to start of next line } static unsigned parse_next_delta_literal(std::istream &f, unsigned ref) @@ -342,8 +343,6 @@ void AigerReader::parse_aiger_binary() and_cell->setPort("\\B", i2_wire); and_cell->setPort("\\Y", o_wire); } - std::getline(f, line); // Ignore up to start of next line - } struct AigerFrontend : public Frontend { -- cgit v1.2.3 From de1dc7947b3d4bfc4e611740a906915a0c2490b0 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Sun, 17 Feb 2019 20:59:15 -0800 Subject: Revert "Missing headers for Xcode?" This reverts commit c23e3f07517d4818d9ab1b532250353492cf50c2. --- passes/techmap/abc.cc | 2 -- 1 file changed, 2 deletions(-) diff --git a/passes/techmap/abc.cc b/passes/techmap/abc.cc index b215b1ea4..d2d15a4a9 100644 --- a/passes/techmap/abc.cc +++ b/passes/techmap/abc.cc @@ -52,8 +52,6 @@ #include #include #include -#include -#include #ifndef _WIN32 # include -- cgit v1.2.3 From 8e1dbfac3af64339f021ed674bdd98e71cd7fb90 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Sun, 17 Feb 2019 20:59:53 -0800 Subject: Missing OSX headers? --- frontends/aiger/aigerparse.cc | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/frontends/aiger/aigerparse.cc b/frontends/aiger/aigerparse.cc index a1a0a08a0..778b8b070 100644 --- a/frontends/aiger/aigerparse.cc +++ b/frontends/aiger/aigerparse.cc @@ -22,6 +22,11 @@ // Armin Biere. The AIGER And-Inverter Graph (AIG) Format Version 20071012. Technical Report 07/1, October 2011, FMV Reports Series, Institute for Formal Models and Verification, Johannes Kepler University, Altenbergerstr. 69, 4040 Linz, Austria. // http://fmv.jku.at/papers/Biere-FMV-TR-07-1.pdf +#ifdef __linux__ +#include +#endif +#include + #include "kernel/yosys.h" #include "kernel/sigtools.h" #include "aigerparse.h" -- cgit v1.2.3 From 843e7fc8a70b7510ae8dfbad2c9f66d2d64d0e64 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Tue, 19 Feb 2019 09:02:37 -0800 Subject: Fix for using POSIX basename --- frontends/aiger/aigerparse.cc | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/frontends/aiger/aigerparse.cc b/frontends/aiger/aigerparse.cc index 778b8b070..cf7950c85 100644 --- a/frontends/aiger/aigerparse.cc +++ b/frontends/aiger/aigerparse.cc @@ -22,7 +22,7 @@ // Armin Biere. The AIGER And-Inverter Graph (AIG) Format Version 20071012. Technical Report 07/1, October 2011, FMV Reports Series, Institute for Formal Models and Verification, Johannes Kepler University, Altenbergerstr. 69, 4040 Linz, Austria. // http://fmv.jku.at/papers/Biere-FMV-TR-07-1.pdf -#ifdef __linux__ +#ifndef _WIN32 #include #endif #include @@ -400,7 +400,9 @@ struct AigerFrontend : public Frontend { #ifdef _WIN32 module_name = "top"; // FIXME: basename equivalent on Win32? #else - module_name = RTLIL::escape_id(basename(filename.c_str())); + char* bn = strdup(filename.c_str()); + module_name = RTLIL::escape_id(bn); + free(bn); #endif } -- cgit v1.2.3 From d365682a21147b6a06d9548a6f4b99d347931441 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Tue, 19 Feb 2019 15:25:47 -0800 Subject: Add aiger tests to make tests --- Makefile | 1 + 1 file changed, 1 insertion(+) diff --git a/Makefile b/Makefile index d83a71256..4324b2eec 100644 --- a/Makefile +++ b/Makefile @@ -580,6 +580,7 @@ test: $(TARGETS) $(EXTRA_TARGETS) +cd tests/sat && bash run-test.sh +cd tests/svinterfaces && bash run-test.sh $(SEEDOPT) +cd tests/opt && bash run-test.sh + +cd tests/aiger && bash run-test.sh @echo "" @echo " Passed \"make test\"." @echo "" -- cgit v1.2.3