From a3fa9fd6e94786119c21915772fde794930c924f Mon Sep 17 00:00:00 2001
From: Eddie Hung <eddie@fpgeh.com>
Date: Thu, 16 Apr 2020 08:01:26 -0700
Subject: abc: use YosysHQ/abc instead of upstream berkeley-abc/abc

Enabling modifications
---
 Makefile | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Makefile b/Makefile
index b3cfd71f9..da8701355 100644
--- a/Makefile
+++ b/Makefile
@@ -133,9 +133,9 @@ bumpversion:
 # is just a symlink to your actual ABC working directory, as 'make mrproper'
 # will remove the 'abc' directory and you do not want to accidentally
 # delete your work on ABC..
-ABCREV = ed90ce2
+ABCREV = d14acd8
 ABCPULL = 1
-ABCURL ?= https://github.com/berkeley-abc/abc
+ABCURL ?= https://github.com/YosysHQ/abc
 ABCMKARGS = CC="$(CXX)" CXX="$(CXX)" ABC_USE_LIBSTDCXX=1
 
 # set ABCEXTERNAL = <abc-command> to use an external ABC instance
-- 
cgit v1.2.3


From c34d57de2e204653cd5b550de671376f9607773b Mon Sep 17 00:00:00 2001
From: Eddie Hung <eddie@fpgeh.com>
Date: Mon, 27 Apr 2020 12:08:45 -0700
Subject: Update CHANGELOG and manual for departure from upstream

---
 CHANGELOG                   | 4 ++--
 manual/CHAPTER_Auxprogs.tex | 5 +++--
 2 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/CHANGELOG b/CHANGELOG
index df8e14b26..3b36c3182 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -8,7 +8,7 @@ Yosys 0.9 .. Yosys 0.9-dev
 
  * Various
     - Added "write_xaiger" backend
-    - Added "abc9" pass for timing-aware techmapping (experimental, FPGA only, no FFs)
+    - Added "abc9" pass for timing-aware techmapping (experimental, FPGA only)
     - Added "synth_xilinx -abc9" (experimental)
     - Added "synth_ice40 -abc9" (experimental)
     - Added "synth -abc9" (experimental)
@@ -58,7 +58,6 @@ Yosys 0.9 .. Yosys 0.9-dev
     - Added support for SystemVerilog wildcard port connections (.*)
     - Added "xilinx_dffopt" pass
     - Added "scratchpad" pass
-    - Added "abc9 -dff"
     - Added "synth_xilinx -dff"
     - Improved support of $readmem[hb] Memory Content File inclusion
     - Added "opt_lut_ins" pass
@@ -66,6 +65,7 @@ Yosys 0.9 .. Yosys 0.9-dev
     - Removed "dffsr2dff" (use opt_rmdff instead)
     - Added "design -delete"
     - Added "select -unset"
+    - Use YosysHQ/abc instead of upstream berkeley-abc/abc
 
 Yosys 0.8 .. Yosys 0.9
 ----------------------
diff --git a/manual/CHAPTER_Auxprogs.tex b/manual/CHAPTER_Auxprogs.tex
index 724d37f0b..f09b18f76 100644
--- a/manual/CHAPTER_Auxprogs.tex
+++ b/manual/CHAPTER_Auxprogs.tex
@@ -19,7 +19,8 @@ for details.
 
 \section{yosys-abc}
 
-This is a unmodified copy of ABC \citeweblink{ABC}. Not all versions of Yosys
-work with all versions of ABC. So Yosys comes with its own yosys-abc to avoid
+This is a fork of ABC \citeweblink{ABC} with a small set of custom modifications
+that have not yet been accepted upstream. Not all versions of Yosys work with
+all versions of ABC. So Yosys comes with its own yosys-abc to avoid
 compatibility issues between the two.
 
-- 
cgit v1.2.3