From 4cb27b1a3ac24cb6367533ac63cfc63123fab2de Mon Sep 17 00:00:00 2001 From: Patrick Urban Date: Tue, 14 Feb 2023 07:51:31 +0100 Subject: gatemate: Ensure compatibility of LVDS ports with VHDL --- techlibs/gatemate/cells_sim.v | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/techlibs/gatemate/cells_sim.v b/techlibs/gatemate/cells_sim.v index 7e88fd7cf..7ed6d83ff 100644 --- a/techlibs/gatemate/cells_sim.v +++ b/techlibs/gatemate/cells_sim.v @@ -114,10 +114,10 @@ module CC_LVDS_IBUF #( parameter [0:0] FF_IBF = 1'bx )( (* iopad_external_pin *) - input IP, IN, + input I_P, I_N, output Y ); - assign Y = IP; + assign Y = I_P; endmodule @@ -133,10 +133,10 @@ module CC_LVDS_OBUF #( )( input A, (* iopad_external_pin *) - output OP, ON + output O_P, O_N ); - assign OP = A; - assign ON = ~A; + assign O_P = A; + assign O_N = ~A; endmodule @@ -152,10 +152,10 @@ module CC_LVDS_TOBUF #( )( input A, T, (* iopad_external_pin *) - output OP, ON + output O_P, O_N ); - assign OP = T ? 1'bz : A; - assign ON = T ? 1'bz : ~A; + assign O_P = T ? 1'bz : A; + assign O_N = T ? 1'bz : ~A; endmodule @@ -174,12 +174,12 @@ module CC_LVDS_IOBUF #( )( input A, T, (* iopad_external_pin *) - inout IOP, ION, + inout IO_P, IO_N, output Y ); - assign IOP = T ? 1'bz : A; - assign ION = T ? 1'bz : ~A; - assign Y = IOP; + assign IO_P = T ? 1'bz : A; + assign IO_N = T ? 1'bz : ~A; + assign Y = IO_P; endmodule -- cgit v1.2.3