From 27c5bafc956b0dac22ef009645c15fe2eef326b7 Mon Sep 17 00:00:00 2001
From: Miodrag Milanovic <mmicko@gmail.com>
Date: Mon, 14 Mar 2022 15:39:11 +0100
Subject: Proper example code
---
tests/sat/grom_cpu.v | 2 +-
tests/sat/ram_memory.v | 2 ++
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/tests/sat/grom_cpu.v b/tests/sat/grom_cpu.v
index f9fef043b..914c0f56c 100644
--- a/tests/sat/grom_cpu.v
+++ b/tests/sat/grom_cpu.v
@@ -185,7 +185,7 @@ module grom_cpu(
`ifdef DISASSEMBLY
$display("INC R%d",IR[1:0]);
`endif
- alu_op <= 4'b0001; // ALU_OP_ADD
+ alu_op <= 4'b0000; // ALU_OP_ADD
end
2'b01 : begin
`ifdef DISASSEMBLY
diff --git a/tests/sat/ram_memory.v b/tests/sat/ram_memory.v
index 053ef206c..0d91514b2 100644
--- a/tests/sat/ram_memory.v
+++ b/tests/sat/ram_memory.v
@@ -27,6 +27,8 @@ module ram_memory(
store[256] <= 8'b11010001; // OUT [0],R1
store[257] <= 8'b00000000; //
store[258] <= 8'b01111110; // RET
+
+ store[512] <= 8'b00000000;
end
always @(posedge clk)
--
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