index
:
iCE40/yosys
master
[no description]
about
summary
refs
log
tree
commit
diff
stats
log msg
author
committer
range
path:
root
/
tests
/
simple
/
scopes.v
Commit message (
Collapse
)
Author
Age
Files
Lines
*
Improved scope resolution of local regs in Verilog+AST frontend
Clifford Wolf
2014-08-05
1
-0
/
+63