iCE40/yosys - [no description]

	Commit message (Collapse)	Author	Age	Files	Lines
*	Fixing old e-mail addresses and deadnames	Claire Xenia Wolf	2021-06-08	1	-1/+1
\| \| \| \| \| \| \| \|	s/((Claire\|Xen\|Xenia\|Clifford)\s+)+(Wolf\|Xen)\s+<(claire\|clifford)@(symbioticeda.com\|clifford.at\|yosyshq.com)>/Claire Xenia Wolf <claire@yosyshq.com>/gi; s/((Nina\|Nak\|N\.)\s+)+Engelhardt\s+<nak@(symbioticeda.com\|yosyshq.com)>/N. Engelhardt <nak@yosyshq.com>/gi; s/((David)\s+)+Shah\s+<(dave\|david)@(symbioticeda.com\|yosyshq.com\|ds0.me)>/David Shah <dave@ds0.me>/gi; s/((Miodrag)\s+)+Milanovic\s+<(miodrag\|micko)@(symbioticeda.com\|yosyshq.com)>/Miodrag Milanovic <micko@yosyshq.com>/gi; s,https?://www.clifford.at/yosys/,http://yosyshq.net/yosys/,g;
*	xilinx: Use dfflegalize.	Marcelina Kościelnicka	2020-07-09	1	-0/+120
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*	synth_xilinx: Support init values on Spartan 6 flip-flops properly.	Marcin Kościelnicki	2019-09-07	1	-42/+0
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*	xilinx: Fix the default values for FDPE/FDSE INIT attributes to match ↵	Marcin Kościelnicki	2019-07-11	1	-4/+4
\| \| \| \|	ISE/Vivado.
*	Move neg-pol to pos-pol mapping from ff_map to cells_map.v	Eddie Hung	2019-04-28	1	-9/+4
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*	Tidy up, fix for -nosrl	Eddie Hung	2019-04-21	1	-4/+9
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*	Retry	Eddie Hung	2019-04-05	1	-1/+1
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*	Resolve @daveshah1 comment, update synth_xilinx help	Eddie Hung	2019-04-05	1	-4/+4
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*	Changes required for VPR place and route synth_xilinx.	Keith Rothman	2019-03-01	1	-0/+42
	Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>