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* nexus: Fix BRAM write enable in PDP modegatecat2023-01-041-2/+2
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* nexus: Fix BRAM mapping.Marcelina Kościelnicka2022-08-091-18/+56
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* nexus: Use `memory_libmap` pass.Marcelina Kościelnicka2022-05-1810-517/+677
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* nexus: Fix arith_map CO signal.Marcelina Kościelnicka2022-02-061-1/+1
| | | | Fixes #3187.
* nexus: Fix BB sim modelgatecat2022-01-191-2/+2
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* iopadmap: Add native support for negative-polarity output enable.Marcelina Kościelnicka2021-11-092-9/+1
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* Gowin: deal with active-low tristate (#2971)Pepijn de Vos2021-08-201-1/+1
| | | | | | | | | * deal with active-low tristate * remove empty port * update sim models * add expected lut1 to tests
* Use HTTPS for website links, gatecat emailClaire Xenia Wolf2021-06-092-2/+2
| | | | | | | | | | git ls-tree -r --name-only HEAD | xargs sed -i -rf ~/fixemails.sed s/((Claire|Xen|Xenia|Clifford)\s+)+(Wolf|Xen)\s+<(claire|clifford)@(symbioticeda.com|clifford.at|yosyshq.com)>/Claire Xenia Wolf <claire@yosyshq.com>/gi; s/((Nina|Nak|N\.)\s+)+Engelhardt\s+<nak@(symbioticeda.com|yosyshq.com)>/N. Engelhardt <nak@yosyshq.com>/gi; s/((David)\s+)+(Shah|gatecat)\s+<(dave|david|gatecat)@(symbioticeda.com|yosyshq.com|ds0.me)>/gatecat <gatecat@ds0.me>/gi; s/((Miodrag)\s+)+Milanovic\s+<(miodrag|micko)@(symbioticeda.com|yosyshq.com)>/Miodrag Milanovic <micko@yosyshq.com>/gi; s,https?://www.clifford.at/yosys/|http://yosyshq.net/yosys/,https://yosyshq.net/yosys/,g;
* Fixing old e-mail addresses and deadnamesClaire Xenia Wolf2021-06-081-1/+1
| | | | | | | | s/((Claire|Xen|Xenia|Clifford)\s+)+(Wolf|Xen)\s+<(claire|clifford)@(symbioticeda.com|clifford.at|yosyshq.com)>/Claire Xenia Wolf <claire@yosyshq.com>/gi; s/((Nina|Nak|N\.)\s+)+Engelhardt\s+<nak@(symbioticeda.com|yosyshq.com)>/N. Engelhardt <nak@yosyshq.com>/gi; s/((David)\s+)+Shah\s+<(dave|david)@(symbioticeda.com|yosyshq.com|ds0.me)>/David Shah <dave@ds0.me>/gi; s/((Miodrag)\s+)+Milanovic\s+<(miodrag|micko)@(symbioticeda.com|yosyshq.com)>/Miodrag Milanovic <micko@yosyshq.com>/gi; s,https?://www.clifford.at/yosys/,http://yosyshq.net/yosys/,g;
* Blackbox all whiteboxes after synthesisgatecat2021-03-171-0/+1
| | | | | | | This prevents issues like processes in whiteboxes triggering an error in the JSON backend. Signed-off-by: gatecat <gatecat@ds0.me>
* nexus: Add MULTADDSUB9X9WIDE sim modelDavid Shah2020-12-081-0/+115
| | | | Signed-off-by: David Shah <dave@ds0.me>
* nexus: Add LRAM inferenceDavid Shah2020-12-075-1/+227
| | | | Signed-off-by: David Shah <dave@ds0.me>
* nexus: More efficient CO mappingDavid Shah2020-12-021-2/+2
| | | | Signed-off-by: David Shah <dave@ds0.me>
* nexus: DSP inference supportDavid Shah2020-11-203-1/+117
| | | | Signed-off-by: David Shah <dave@ds0.me>
* nexus: Add DSP simulation modelDavid Shah2020-11-183-250/+573
| | | | Signed-off-by: David Shah <dave@ds0.me>
* nexus: Add make_transp to BRAMsDavid Shah2020-10-221-0/+3
| | | | Signed-off-by: David Shah <dave@ds0.me>
* synth_nexus: Initial implementationDavid Shah2020-10-1514-0/+12229
Signed-off-by: David Shah <dave@ds0.me>