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path: root/techlibs/intel/cycloneive/arith_map.v
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* Add force_downto and force_upto wire attributes.Marcelina Kościelnicka2020-05-191-0/+6
| | | | Fixes #2058.
* Reduce amount of trailing whitespace in code baseLarry Doolittle2019-02-281-5/+5
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* Fixed broken Quartus backend on dffeas init value (Error (12170): Illegal ↵c60k282018-03-311-2/+49
| | | | value for the POWER_UP parameter. Fixed and tested Cyclone V device
* Clean whitespace and permissions in techlibs/intelLarry Doolittle2017-10-051-2/+2
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* Adding Cyclone IV (E, GX), Arria 10, Cyclone V and LPM functions (ALTPLL and ↵dh732017-10-011-0/+52
M9K); M9K is not finished yet. Achronix Speedster also in this commit. Both Arria10 and Speedster-i are still experimental due complexity, but you can experiment around those devices right now