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* | OoopsieEddie Hung2019-06-031-1/+1
* | Consistent with xilinxEddie Hung2019-06-033-4/+4
* | Merge branch 'xaig' into xc7muxEddie Hung2019-05-311-1/+1
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| * | Use nonblockingEddie Hung2019-04-231-1/+1
* | | Merge remote-tracking branch 'origin/master' into xc7muxEddie Hung2019-05-211-0/+11
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| * | ice40/cells_sim.v: Add support for TRIM input to SB_HFOSCSylvain Munaut2019-05-131-0/+11
| * | Merge pull request #969 from YosysHQ/clifford/pmgenstuffClifford Wolf2019-05-031-0/+2
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* | \ \ Merge remote-tracking branch 'origin/clifford/pmgenstuff' into xc7muxEddie Hung2019-05-021-0/+2
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| * | | Run "peepopt" in generic "synth" pass and "synth_ice40"Clifford Wolf2019-04-301-0/+2
* | | | Merge remote-tracking branch 'origin/master' into xc7muxEddie Hung2019-05-021-4/+6
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| * | Cleanup ice40Eddie Hung2019-04-261-4/+6
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* | Merge remote-tracking branch 'origin/master' into xaigEddie Hung2019-04-221-10/+19
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| * ice40 cells_sim.v: SB_IO: update clock enable behaviour based on hardware exp...Luke Wren2019-04-211-10/+19
* | Convert to use #945Eddie Hung2019-04-212-9/+3
* | ABC_FLOPS -> ABC_MODEL -- only whitebox if ABC_MODEL setEddie Hung2019-04-192-4/+7
* | Make SB_DFF whiteboxEddie Hung2019-04-193-3/+3
* | Fix SB_DFF comb modelEddie Hung2019-04-182-3/+3
* | Missing close bracketEddie Hung2019-04-181-1/+1
* | Annotate SB_DFF* with abc_flop and abc_box_idEddie Hung2019-04-181-22/+49
* | Add SB_DFF* to boxesEddie Hung2019-04-183-6/+306
* | Use new -wb flag for ABC flowEddie Hung2019-04-183-19/+5
* | Also update Makefile.incEddie Hung2019-04-181-7/+6
* | Make SB_LUT4 a blackboxEddie Hung2019-04-183-3/+3
* | Fix renameEddie Hung2019-04-181-0/+0
* | Rename to abc_*.{box,lut}Eddie Hung2019-04-186-0/+0
* | Update Makefile.inc tooEddie Hung2019-04-171-4/+6
* | Reduce to three devices: hx, lp, uEddie Hung2019-04-177-4/+23
* | Add up5k timingsEddie Hung2019-04-172-0/+19
* | Update error messageEddie Hung2019-04-171-1/+1
* | Add "-device" argument to synth_ice40Eddie Hung2019-04-174-7/+20
* | Missing abc_flop_q attribute on SPRAMEddie Hung2019-04-171-1/+1
* | Map to SB_LUT4 from fastest input firstEddie Hung2019-04-171-7/+11
* | Mark seq output ports with "abc_flop_q" attrEddie Hung2019-04-171-24/+24
* | Also update Makefile.incEddie Hung2019-04-171-3/+3
* | synth_ice40 to use renamed filesEddie Hung2019-04-171-2/+2
* | Rename to abc.*Eddie Hung2019-04-173-0/+0
* | Revert "Try using an ICE40_CARRY_LUT primitive to avoid ABC issues"Eddie Hung2019-04-177-102/+35
* | Try using an ICE40_CARRY_LUT primitive to avoid ABC issuesEddie Hung2019-04-177-35/+102
* | Fix spacingEddie Hung2019-04-171-5/+5
* | Add SB_LUT4 to box libraryEddie Hung2019-04-163-0/+16
* | Add ice40 box filesEddie Hung2019-04-166-1/+27
* | Merge branch 'master' into xaigEddie Hung2019-04-085-42/+198
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| * Remove ice40/cells_sim.v hack to avoid warning for blocking memory writesClifford Wolf2019-03-121-19/+0
| * Fix typo in ice40_braminit help msgClifford Wolf2019-03-091-1/+1
| * Merge pull request #859 from smunaut/ice40_braminitClifford Wolf2019-03-094-37/+212
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| | * ice40: Run ice40_braminit pass by defaultSylvain Munaut2019-03-081-0/+1
| | * ice40: Add ice40_braminit pass to allow initialization of BRAM from fileSylvain Munaut2019-03-083-37/+211
| * | ice40: use 2 bits for READ/WRITE MODE for SB_RAM mapElms2019-02-281-2/+2
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* | Merge remote-tracking branch 'origin/master' into xaigEddie Hung2019-02-261-1/+1
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| * Merge pull request #740 from daveshah1/improve_dressClifford Wolf2019-02-221-1/+1
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