| Commit message (Expand) | Author | Age | Files | Lines | ||
|---|---|---|---|---|---|---|
| ... | ||||||
| * | iCE40 DFF sim models: init Q regs to 0 | Clifford Wolf | 2015-07-20 | 1 | -20/+43 | |
| * | Avoid tristate warning for blackbox ice40/cells_sim.v | Clifford Wolf | 2015-07-18 | 1 | -0/+2 | |
| * | Fixed trailing whitespaces | Clifford Wolf | 2015-07-02 | 1 | -2/+2 | |
| * | Added iCE40 PLL cells | Clifford Wolf | 2015-05-31 | 1 | -0/+168 | |
| * | improved ice40 SB_IO sim model | Clifford Wolf | 2015-05-23 | 1 | -16/+9 | |
| * | Added ice40 SB_IO sim model | Clifford Wolf | 2015-05-23 | 1 | -1/+46 | |
| * | improved iCE40 SB_RAM40_4K simulation model | Clifford Wolf | 2015-04-25 | 1 | -59/+83 | |
| * | More iCE40 bram improvements | Clifford Wolf | 2015-04-25 | 1 | -41/+61 | |
| * | iCE40 bram tests and fixes | Clifford Wolf | 2015-04-24 | 1 | -8/+31 | |
| * | iCE40: Added SB_RAM40_4K{,NR,NW,NRNW}* models | Clifford Wolf | 2015-04-19 | 1 | -13/+289 | |
| * | Changed ice40 ICESTORM_CARRYCONST port name | Clifford Wolf | 2015-04-16 | 1 | -2/+2 | |
| * | improved ice40 dff cell mapping | Clifford Wolf | 2015-04-16 | 1 | -4/+4 | |
| * | more cells in ice40 cell library | Clifford Wolf | 2015-04-14 | 1 | -8/+289 | |
| * | Added very first version of "synth_ice40" | Clifford Wolf | 2015-03-05 | 1 | -0/+12 | |
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index : iCE40/yosys | |
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