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* Add bitwise `$bweqx` and `$bwmux` cellsJannis Harder2022-11-301-1/+1
| | | | | | The new bitwise case equality (`$bweqx`) and bitwise mux (`$bwmux`) cells enable compact encoding and decoding of 3-valued logic signals using multiple 2-valued signals.
* Add $bmux and $demux cells.Marcelina Kościelnicka2022-01-281-1/+38
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* Hook up $aldff support in various passes.Marcelina Kościelnicka2021-10-021-1/+1
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* Fixing old e-mail addresses and deadnamesClaire Xenia Wolf2021-06-081-1/+1
| | | | | | | | s/((Claire|Xen|Xenia|Clifford)\s+)+(Wolf|Xen)\s+<(claire|clifford)@(symbioticeda.com|clifford.at|yosyshq.com)>/Claire Xenia Wolf <claire@yosyshq.com>/gi; s/((Nina|Nak|N\.)\s+)+Engelhardt\s+<nak@(symbioticeda.com|yosyshq.com)>/N. Engelhardt <nak@yosyshq.com>/gi; s/((David)\s+)+Shah\s+<(dave|david)@(symbioticeda.com|yosyshq.com|ds0.me)>/David Shah <dave@ds0.me>/gi; s/((Miodrag)\s+)+Milanovic\s+<(miodrag|micko)@(symbioticeda.com|yosyshq.com)>/Miodrag Milanovic <micko@yosyshq.com>/gi; s,https?://www.clifford.at/yosys/,http://yosyshq.net/yosys/,g;
* techmap/shift_shiftx: Remove the "shiftx2mux" special path.Marcelina Kościelnicka2020-08-201-67/+35
| | | | | | | | | | | | | | Our techmap rules for $shift and $shiftx cells contained a special path that aimed to decompose the shift LSB-first instead of MSB-first in select cases that come up in pmux lowering. This path was needlessly overcomplicated and contained bugs. Instead of doing that, just switch over the main path to iterate LSB-first (except for the specially-handled MSB for signed shifts and overflow handling). This also makes the code consistent with shl/shr/sshl/sshr cells, which are already decomposed LSB-first. Fixes #2346.
* Respect \A_SIGNED for $shiftXiretza2020-08-181-2/+4
| | | | | | This reflects the behaviour of $shr/$shl, which sign-extend their A operands to the size of their output, then do a logical shift (shift in 0-bits).
* Add new FF types to simplemap.Marcelina Kościelnicka2020-06-231-1/+1
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* Add flooring division operatorXiretza2020-05-281-0/+28
| | | | | | | | | | The $div and $mod cells use truncating division semantics (rounding towards 0), as defined by e.g. Verilog. Another rounding mode, flooring (rounding towards negative infinity), can be used in e.g. VHDL. The new $divfloor cell provides this flooring division. This commit also fixes the handling of $div in opt_expr, which was previously optimized as if it was $divfloor.
* Add flooring modulo operatorXiretza2020-05-281-3/+76
| | | | | | | | | | | The $div and $mod cells use truncating division semantics (rounding towards 0), as defined by e.g. Verilog. Another rounding mode, flooring (rounding towards negative infinity), can be used in e.g. VHDL. The new $modfloor cell provides this flooring modulo (also known as "remainder" in several languages, but this name is ambiguous). This commit also fixes the handling of $mod in opt_expr, which was previously optimized as if it was $modfloor.
* Add force_downto and force_upto wire attributes.Marcelina Kościelnicka2020-05-191-23/+50
| | | | Fixes #2058.
* techlibs/common: more robustness when *_WIDTH = 0Eddie Hung2020-05-051-5/+24
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* techmap: fix shiftx2mux decompositionEddie Hung2020-02-071-8/+6
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* shiftx2mux: fix select out of boundsEddie Hung2020-02-051-1/+2
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* Explicitly create separate $mux cellsEddie Hung2020-01-211-2/+2
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* Fix tests -- when Y_WIDTH is non-pow-2Eddie Hung2020-01-211-3/+4
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* Move from +/shiftx2mux.v into +/techmap.v; cleanupEddie Hung2020-01-211-34/+69
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* Added $ff and $_FF_ cell typesClifford Wolf2016-10-121-1/+1
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* Improved support for $sop cellsClifford Wolf2016-06-171-1/+1
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* Renamed opt_const to opt_exprClifford Wolf2016-03-311-2/+2
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* Added $tribuf and $_TBUF_ cell typesClifford Wolf2015-08-161-1/+1
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* Another block of spelling fixesLarry Doolittle2015-08-141-1/+1
| | | | Smaller this time
* Fixed trailing whitespacesClifford Wolf2015-07-021-3/+3
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* Added simplemap $lut supportClifford Wolf2015-04-271-8/+2
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* Improvements in simplemap api, added $ne $nex $eq $eqx supportClifford Wolf2014-12-241-49/+5
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* Removed UTF-8 chars from techmap.vClifford Wolf2014-12-121-1/+1
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* Added $dffe cell typeClifford Wolf2014-12-081-1/+1
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* Using alumacc in techmap.vClifford Wolf2014-09-141-237/+33
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* Added $lcu cell typeClifford Wolf2014-09-081-74/+8
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* Added "$fa" cell typeClifford Wolf2014-09-081-0/+12
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* Using maccmap for $macc and $mul techmapClifford Wolf2014-09-071-190/+16
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* Various bug fixes (related to $macc model testing)Clifford Wolf2014-09-061-1/+1
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* Added $macc SAT modelClifford Wolf2014-09-061-3/+3
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* Added $macc simlib model (also use as techmap rule for now)Clifford Wolf2014-09-061-0/+86
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* Removed $bu0 cell typeClifford Wolf2014-09-041-10/+5
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* Added $lut support in test_cell, techmap, satgenClifford Wolf2014-08-311-0/+17
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* Added $alu cell typeClifford Wolf2014-08-301-3/+2
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* Replaced $__alu CO/CS outputs with full-width CO outputClifford Wolf2014-08-301-32/+28
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* Using "via_celltype" in $mul carry-save-acc implementationClifford Wolf2014-08-181-34/+72
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* Performance fix for new $__lcu techmap ruleClifford Wolf2014-08-181-7/+5
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* Replaced recursive lcu scheme with bk adderClifford Wolf2014-08-181-61/+31
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* Multiply using a carry-save accumulatorClifford Wolf2014-08-161-5/+45
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* Changes in techmap $__alu interfaceClifford Wolf2014-08-161-17/+17
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* Renamed $_INV_ cell type to $_NOT_Clifford Wolf2014-08-151-1/+1
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* Simplified $__arraymul techmap ruleClifford Wolf2014-08-141-7/+13
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* RIP $safe_pmuxClifford Wolf2014-08-141-37/+0
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* Added techmap support for actual lookahead carry unitClifford Wolf2014-08-131-22/+73
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* Preparations for lookahead ALU support in techmap.vClifford Wolf2014-08-131-28/+92
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* New interface for $__alu in techmap.vClifford Wolf2014-08-131-129/+62
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* Implemented recursive techmapClifford Wolf2014-08-031-1/+1
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* Renamed "stdcells.v" to "techmap.v"Clifford Wolf2014-07-311-0/+785
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