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| * | | Remove now-redundant dff2dffs pass.Marcelina Kościelnicka2020-08-072-166/+0
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| * | | peepopt: Remove now-redundant dffmux pattern.Marcelina Kościelnicka2020-08-073-175/+0
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| * | | Remove now-redundant opt_rmdff pass.Marcelina Kościelnicka2020-08-072-712/+0
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* | | Merge pull request #2327 from YosysHQ/mwk/techmap-constmap-fixclairexen2020-08-201-1/+22
|\ \ \ | | | | | | | | techmap.CONSTMAP: Handle outputs before inputs.
| * | | techmap.CONSTMAP: Handle outputs before inputs.Marcelina Kościelnicka2020-08-051-1/+22
| | |/ | |/| | | | | | | Fixes #2321.
* | | Merge pull request #2326 from YosysHQ/mwk/peeopt-muldiv-signclairexen2020-08-201-1/+4
|\ \ \ | | | | | | | | peepopt.muldiv: Add a signedness check.
| * | | peepopt.muldiv: Add a signedness check.Marcelina Kościelnicka2020-08-041-1/+4
| |/ / | | | | | | | | | Fixes #2318.
* | | Merge pull request #2319 from YosysHQ/mwk/techmap-celltype-patternclairexen2020-08-201-4/+32
|\ \ \ | | | | | | | | techmap: Add support for [] wildcards in techmap_celltype.
| * | | techmap: Add support for [] wildcards in techmap_celltype.Marcelina Kościelnicka2020-08-021-4/+32
| |/ / | | | | | | | | | Fixes #1826.
* | / Ensure \A_SIGNED is never used with $shiftxXiretza2020-08-181-0/+4
| |/ |/| | | | | | | It has no effect on the output ($shiftx doesn't perform any sign extension whatsoever), so an attempt to use it should be caught early.
* | Replace opt_rmdff with opt_dff.Marcelina Kościelnicka2020-08-072-9/+17
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* Add dffunmap pass.Marcelina Kościelnicka2020-07-312-0/+108
| | | | | To be used with backends that cannot deal with fancy FF types (like blif or smt).
* opt_expr: Remove -clkinv option, make it the default.Marcelina Kościelnicka2020-07-312-14/+14
| | | | | Adds -noclkinv option just in case the old behavior was actually useful to someone.
* synth_ice40: Use opt_dff.Marcelina Kościelnicka2020-07-302-247/+86
| | | | | | | | | The main part is converting ice40_dsp to recognize the new FF types created in opt_dff instead of trying to recognize the mux patterns on its own. The fsm call has been moved upwards because the passes cannot deal with $dffe/$sdff*, and other optimizations don't help it much anyway.
* synth_xilinx: Use opt_dff.Marcelina Kościelnicka2020-07-305-861/+200
| | | | | | | | | The main part is converting xilinx_dsp to recognize the new FF types created in opt_dff instead of trying to recognize the patterns on its own. The fsm call has been moved upwards because the passes cannot deal with $dffe/$sdff*, and other optimizations don't help it much anyway.
* async2sync: Support all FF types.Marcelina Kościelnicka2020-07-302-145/+162
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* Add opt_dff pass.Marcelina Kościelnicka2020-07-302-0/+876
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* opt_expr: Fix handling of $_XNOR_ cells with A = B.Marcelina Kościelnicka2020-07-291-1/+1
| | | | Fixes #2311.
* equiv_induct: Fix up assumption for $equiv cells in -undef mode.Marcelina Kościelnicka2020-07-271-1/+3
| | | | | | | | | | | | | | | | Before this fix, equiv_induct only assumed that one of the following is true: - defined value of A is equal to defined value of B - A is undefined This lets through valuations where A is defined, B is undefined, and the defined (meaningless) value of B happens to match the defined value of A. Instead, tighten this up to OR of the following: - defined value of A is equal to defined value of B, and B is not undefined - A is undefined
* async2sync: Refactor to use FfInitVals.Marcelina Kościelnicka2020-07-241-53/+11
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* memory_dff: Refactor to use FfInitVals.Marcelina Kościelnicka2020-07-241-12/+5
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* proc_dlatch: Refactor to use FfInitVals.Marcelina Kościelnicka2020-07-241-28/+8
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* pmux2shift: Refactor to use FfInitVals.Marcelina Kościelnicka2020-07-241-15/+4
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* wreduce: Refactor to use FfInitVals.Marcelina Kościelnicka2020-07-241-37/+7
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* techmap: Refactor to use FfInitVals.Marcelina Kościelnicka2020-07-241-41/+4
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* shregmap: Refactor to use FfInitVals.Marcelina Kościelnicka2020-07-241-39/+10
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* abc: Refactor to use FfInitVals.Marcelina Kościelnicka2020-07-241-25/+6
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* dffinit: Refactor to use FfInitVals.Marcelina Kościelnicka2020-07-241-41/+7
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* zinit: Refactor to use FfInitVals.Marcelina Kościelnicka2020-07-241-43/+11
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* dfflegalize: Refactor to use FfInitVals.Marcelina Kościelnicka2020-07-241-80/+25
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* clk2fflogic: Support all FF types.Marcelina Kościelnicka2020-07-241-200/+122
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* memory_dff: recognize more dff cellsMarcelina Kościelnicka2020-07-231-11/+112
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* techmap: Add _TECHMAP_CELLNAME_ special parameter.Marcelina Kościelnicka2020-07-211-0/+6
| | | | | | | This parameter will resolve to the name of the cell being mapped. The first user of this parameter will be synth_intel_alm's Quartus output, which requires a unique (and preferably descriptive) name passed as a cell parameter for the memory cells.
* qbfsat: Add `-solver-option` option.Alberto Gonzalez2020-07-202-1/+15
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* opt_merge: Dedup one more use of FF cell type list.Marcelina Kościelnicka2020-07-151-3/+1
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* proc_dlatch: Remove init values for combinatorial processes.Marcelina Kościelnicka2020-07-121-0/+33
| | | | Fixes #2258.
* dfflegalize: Gather init values from all wires.Marcelina Kościelnicka2020-07-121-1/+1
| | | | Skipping non-selected wires is unsound in an obvious way.
* dfflibmap: Refactor to use dfflegalize internally.Marcelina Kościelnicka2020-07-091-211/+78
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* clkbufmap: improve input pad handling.Marcelina Kościelnicka2020-07-091-17/+39
| | | | | | - allow inserting only the input pad cell - do not insert the usual buffer if the input pad already acts as a buffer
* clk2fflogic: Consistently treat async control signals as negative hold.Marcelina Kościelnicka2020-07-091-57/+51
| | | | | | | This fixes some dfflegalize equivalence checks, and breaks others — and I strongly suspect the others are due to bad support for multiple async inputs in `proc` (in particular, lack of proper support for dlatchsr and sketchy circuits on dffsr control inputs).
* dfflegalize: Add special support for const-D latches.Marcelina Kościelnicka2020-07-091-0/+18
| | | | | | Those can be created by `opt_dff` when optimizing `$adff` with const clock, or with D == Q. Make dfflegalize do the opposite transform when such dlatches would be otherwise unimplementable.
* dfflegalize: typo fixMarcelina Kościelnicka2020-07-071-1/+1
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* Naming fixes.Marcelina Kościelnicka2020-07-052-2/+2
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* dfflegalize: Prefer mapping dff to sdff before adffMarcelina Kościelnicka2020-07-051-1/+1
| | | | | | This ensures that, when both sync and async FFs are available and abc9 is involved, the sync FFs will be used, and will thus remain available for sequential synthesis.
* opt_expr: Fix crash on $mul optimization with more zeros removed than Y has.Marcelina Kościelnicka2020-07-051-0/+8
| | | | Fixes #2221.
* abc9: only techmap (* abc9_flop *) modulesEddie Hung2020-07-041-1/+1
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* abc9: techmap from user design to allow abc9_flop modules to be composedEddie Hung2020-07-041-1/+1
| | | | from other primitives
* Add newlines to help text for dfflegalizeRupert Swarbrick2020-07-031-11/+11
| | | | | | | | | | | | | I think these were probably missed by accident. Spotted because GCC spits out lots of messages like this: passes/techmap/dfflegalize.cc:114:7: warning: zero-length gnu_printf format string [-Wformat-zero-length] 114 | log(""); | ^~ (because we tell GCC that the first argument to log() looks like a printf control string in log.h, and a zero length such string triggers a warning).
* Merge pull request #2208 from boqwxp/qbfsat-cleanupclairexen2020-07-022-255/+273
|\ | | | | qbfsat: Cleanup and refactoring
| * qbfsat: Remove useless comment and #ifndef guards.Alberto Gonzalez2020-07-011-5/+0
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