Commit message (Collapse) | Author | Age | Files | Lines | |
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* | kernel: use more ID::* | Eddie Hung | 2020-04-02 | 1 | -2/+2 |
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* | Suppress warning message for init[i] = 1'bx | Eddie Hung | 2019-12-11 | 1 | -1/+2 |
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* | Revert "Be mindful that sigmap(wire) could have dupes when checking \init" | Eddie Hung | 2019-10-08 | 1 | -4/+1 |
| | | | | This reverts commit f46ac1df9f8847dac9d9851f2f948d93a1064ff1. | ||||
* | Be mindful that sigmap(wire) could have dupes when checking \init | Eddie Hung | 2019-10-02 | 1 | -1/+4 |
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* | Ignore all 1'bx in (* init *) | Eddie Hung | 2019-08-27 | 1 | -3/+1 |
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* | In sat: 'x' in init attr should not override constant | Eddie Hung | 2019-08-22 | 1 | -0/+2 |
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* | substr() -> compare() | Eddie Hung | 2019-08-07 | 1 | -3/+3 |
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* | Remove std:: namespace | Eddie Hung | 2019-08-07 | 1 | -5/+5 |
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* | stoi -> atoi | Eddie Hung | 2019-08-07 | 1 | -13/+13 |
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* | Use std::stoi instead of atoi(<str>.c_str()) | Eddie Hung | 2019-08-06 | 1 | -13/+13 |
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* | Add a few more filename rewrites | Ben Widawsky | 2019-06-20 | 1 | -0/+4 |
| | | | | | | | | | | This now allows a full pipeline to work, something such as: yosys -p "synth_ecp5 -json ~/work/fpga/prjtrellis/examples/ecp5_evn/blinky.v" Otherwise, you will get something along the lines of: ERROR: Can't open output file `~/work/fpga/prjtrellis/examples/ecp5_evn/blinky.v' for writing: No such file or directory Signed-off-by: Ben Widawsky <ben@bwidawsk.net> | ||||
* | Add missing enable_undef to "sat -tempinduct-def", fixes #883 | Clifford Wolf | 2019-05-02 | 1 | -0/+1 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Consistent use of 'override' for virtual methods in derived classes. | Henner Zeller | 2018-07-20 | 1 | -2/+2 |
| | | | | | | | | | o Not all derived methods were marked 'override', but it is a great feature of C++11 that we should make use of. o While at it: touched header files got a -*- c++ -*- for emacs to provide support for that language. o use YS_OVERRIDE for all override keywords (though we should probably use the plain keyword going forward now that C++11 is established) | ||||
* | Removed $timescale from "sat" command VCD writer | Clifford Wolf | 2018-03-29 | 1 | -1/+0 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Run log_flush() before solving in sat command | Clifford Wolf | 2016-09-06 | 1 | -0/+3 |
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* | Moved SatHelper::setup_init() code to SatHelper::setup() | Clifford Wolf | 2016-07-24 | 1 | -97/+92 |
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* | Added $initstate support to "sat" command | Clifford Wolf | 2016-07-23 | 1 | -13/+12 |
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* | Added "yosys -D" feature | Clifford Wolf | 2016-04-21 | 1 | -1/+1 |
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* | Improved formatting of "sat" output tables | Clifford Wolf | 2016-04-05 | 1 | -5/+5 |
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* | Import more std:: stuff into Yosys namespace | Clifford Wolf | 2015-10-25 | 1 | -6/+6 |
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* | Added sat -show-regs, -show-public, -show-all | Clifford Wolf | 2015-08-18 | 1 | -0/+39 |
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* | Re-created command-reference-manual.tex, copied some doc fixes to online help | Clifford Wolf | 2015-08-14 | 1 | -1/+1 |
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* | Spell check (by Larry Doolittle) | Clifford Wolf | 2015-08-14 | 1 | -1/+1 |
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* | Fixed trailing whitespaces | Clifford Wolf | 2015-07-02 | 1 | -2/+2 |
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* | don't consider blackbox modules in "sat" command | Clifford Wolf | 2015-04-18 | 1 | -7/+5 |
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* | Added non-std verilog assume() statement | Clifford Wolf | 2015-02-26 | 1 | -11/+29 |
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* | Fixed "sat -initsteps" off-by-one bug | Clifford Wolf | 2015-02-22 | 1 | -1/+1 |
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* | Added "sat -stepsize" and "sat -tempinduct-step" | Clifford Wolf | 2015-02-21 | 1 | -21/+64 |
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* | sat docu change | Clifford Wolf | 2015-02-21 | 1 | -0/+3 |
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* | When "sat -tempinduct-baseonly -maxsteps N" reaches maxsteps it is a good thing. | Clifford Wolf | 2015-02-21 | 1 | -0/+5 |
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* | Added "sat -tempinduct-baseonly -tempinduct-inductonly" | Clifford Wolf | 2015-02-21 | 1 | -66/+92 |
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* | Fixed basecase init for "sat -tempinduct" | Clifford Wolf | 2015-02-21 | 1 | -1/+6 |
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* | Replaced ezDefaultSAT with ezSatPtr | Clifford Wolf | 2015-02-21 | 1 | -36/+37 |
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* | format fixes in "sat -dump_json" | Clifford Wolf | 2015-02-19 | 1 | -18/+17 |
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* | Added "sat -dump_json" (WaveJSON format) | Clifford Wolf | 2015-02-19 | 1 | -4/+92 |
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* | Improved an error message | Clifford Wolf | 2015-01-28 | 1 | -1/+1 |
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* | Added "sat -show-ports" | Clifford Wolf | 2015-01-27 | 1 | -2/+7 |
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* | Added log_warning() API | Clifford Wolf | 2014-11-09 | 1 | -2/+2 |
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* | Renamed SIZE() to GetSize() because of name collision on Win32 | Clifford Wolf | 2014-10-10 | 1 | -1/+1 |
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* | namespace Yosys | Clifford Wolf | 2014-09-27 | 1 | -6/+6 |
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* | Corrected spelling mistakes found by lintian | Ruben Undheim | 2014-09-06 | 1 | -1/+1 |
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* | azonenberg: Make dump_vcd save model when temporal induction fails due to ↵ | Clifford Wolf | 2014-08-24 | 1 | -0/+2 |
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* | Added "sat -prove-skip" | Clifford Wolf | 2014-08-08 | 1 | -2/+16 |
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* | More cleanups related to RTLIL::IdString usage | Clifford Wolf | 2014-08-02 | 1 | -3/+3 |
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* | Using log_assert() instead of assert() | Clifford Wolf | 2014-07-28 | 1 | -1/+1 |
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* | Refactoring: Renamed RTLIL::Design::modules to modules_ | Clifford Wolf | 2014-07-27 | 1 | -1/+1 |
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* | Refactoring: Renamed RTLIL::Module::cells to cells_ | Clifford Wolf | 2014-07-27 | 1 | -1/+1 |
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* | Refactoring: Renamed RTLIL::Module::wires to wires_ | Clifford Wolf | 2014-07-27 | 1 | -4/+4 |
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* | Changed users of cell->connections_ to the new API (sed command) | Clifford Wolf | 2014-07-26 | 1 | -2/+2 |
| | | | | | | | | | git grep -l 'connections_' | xargs sed -i -r -e ' s/(->|\.)connections_\["([^"]*)"\] = (.*);/\1set("\2", \3);/g; s/(->|\.)connections_\["([^"]*)"\]/\1get("\2")/g; s/(->|\.)connections_.at\("([^"]*)"\)/\1get("\2")/g; s/(->|\.)connections_.push_back/\1connect/g; s/(->|\.)connections_/\1connections()/g;' | ||||
* | Renamed RTLIL::{Module,Cell}::connections to connections_ | Clifford Wolf | 2014-07-26 | 1 | -2/+2 |
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