| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Cleanup | Eddie Hung | 2019-12-17 | 1 | -11/+7 |
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| * | Enforce non-existence | Eddie Hung | 2019-12-16 | 1 | -0/+4 |
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| * | Update doc | Eddie Hung | 2019-12-16 | 1 | -4/+6 |
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| * | More sloppiness, thanks @dh73 for spotting | Eddie Hung | 2019-12-16 | 1 | -4/+4 |
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| * | Oops | Eddie Hung | 2019-12-16 | 1 | -4/+1 |
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| * | Implement 'attributes' grammar | Eddie Hung | 2019-12-16 | 1 | -80/+88 |
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| * | Fixing compiler warning/issues. Moving test script to the correct place | Diego H | 2019-12-16 | 1 | -8/+8 |
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| * | Merging attribute rules into a single match block; Adding tests | Diego H | 2019-12-15 | 1 | -68/+80 |
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| * | Refactoring memory attribute matching based on IEEE 1364.1 and Tool specific | Diego H | 2019-12-13 | 1 | -0/+77 |
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| * | Error out if enable > dbits | Eddie Hung | 2019-07-13 | 1 | -0/+4 |
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| * | memory_bram: Fix multiport make_transp | David Shah | 2019-04-07 | 1 | -1/+2 |
| | | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
| * | memory_bram: Consider read enable for address expansion register | David Shah | 2019-04-02 | 1 | -0/+2 |
| | | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
| * | memory_bram: Reset make_transp when growing read ports | David Shah | 2019-03-27 | 1 | -0/+1 |
| | | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
| * | memory_bram: Fix multiclock make_transp | David Shah | 2019-03-24 | 1 | -9/+16 |
| | | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
| * | memory_bram: Fix initdata bit order after shuffling | Graham Edgecombe | 2018-12-11 | 1 | -0/+17 |
| | | | | | | | | | | | | | | In some cases the memory_bram pass shuffles the order of the bits in a memory's RD_DATA port. Although the order of the bits in the WR_DATA and WR_EN ports is changed to match the RD_DATA port, the order of the bits in the initialization data is not. This causes reads of initialized memories to return invalid data (until the initialization data is overwritten). This commit fixes the bug by shuffling the initdata bits in exactly the same order as the RD_DATA/WR_DATA/WR_EN bits. | ||||
| * | memory_bram: Reset make_outreg when growing read ports | David Shah | 2018-10-19 | 1 | -0/+1 |
| | | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
| * | Consistent use of 'override' for virtual methods in derived classes. | Henner Zeller | 2018-07-20 | 1 | -2/+2 |
| | | | | | | | | | | o Not all derived methods were marked 'override', but it is a great feature of C++11 that we should make use of. o While at it: touched header files got a -*- c++ -*- for emacs to provide support for that language. o use YS_OVERRIDE for all override keywords (though we should probably use the plain keyword going forward now that C++11 is established) | ||||
| * | Fixed handling of transparent bram rd ports on ROMs | Clifford Wolf | 2016-08-27 | 1 | -0/+3 |
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| * | Don't sign-extend memory bram initialization data | Clifford Wolf | 2016-05-15 | 1 | -1/+1 |
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| * | Added "yosys -D" feature | Clifford Wolf | 2016-04-21 | 1 | -1/+1 |
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| * | Import more std:: stuff into Yosys namespace | Clifford Wolf | 2015-10-25 | 1 | -5/+5 |
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| * | Bugfix in bram read-enable code | Clifford Wolf | 2015-09-25 | 1 | -2/+5 |
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| * | Added read-enable to memory model | Clifford Wolf | 2015-09-25 | 1 | -6/+14 |
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| * | Fixed memory_bram for ROMs in BRAMs with write-enable inputs | Clifford Wolf | 2015-09-24 | 1 | -1/+1 |
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| * | Spell check (by Larry Doolittle) | Clifford Wolf | 2015-08-14 | 1 | -5/+5 |
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| * | Fixed trailing whitespaces | Clifford Wolf | 2015-07-02 | 1 | -2/+2 |
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| * | Added memory_bram "make_outreg" feature | Clifford Wolf | 2015-04-09 | 1 | -2/+25 |
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| * | Added support for "file names with blanks" | Clifford Wolf | 2015-04-08 | 1 | -3/+1 |
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| * | Added support for initialized brams | Clifford Wolf | 2015-04-06 | 1 | -8/+35 |
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| * | Added $meminit support to "memory" command | Clifford Wolf | 2015-02-14 | 1 | -0/+5 |
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| * | Fixed typos found by lintian | Ruben Undheim | 2015-02-01 | 1 | -2/+2 |
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| * | Refactoring of memory_bram and xilinx brams | Clifford Wolf | 2015-01-18 | 1 | -204/+407 |
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| * | memory_bram hotfix for memories with width 1 | Clifford Wolf | 2015-01-06 | 1 | -3/+3 |
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| * | removed old debug code | Clifford Wolf | 2015-01-06 | 1 | -1/+0 |
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| * | Towards Xilinx bram support | Clifford Wolf | 2015-01-06 | 1 | -1/+0 |
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| * | Towards Xilinx bram support | Clifford Wolf | 2015-01-06 | 1 | -1/+1 |
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| * | Towards Xilinx bram support | Clifford Wolf | 2015-01-05 | 1 | -0/+3 |
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| * | Towards Xilinx bram support | Clifford Wolf | 2015-01-04 | 1 | -3/+4 |
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| * | Added memory_bram "shuffle_enable" feature | Clifford Wolf | 2015-01-04 | 1 | -1/+113 |
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| * | Removed left over debug code from memory_bram | Clifford Wolf | 2015-01-04 | 1 | -2/+2 |
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| * | Added memory_bram 'or_next_if_better' feature | Clifford Wolf | 2015-01-03 | 1 | -42/+156 |
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| * | memory_bram transp support | Clifford Wolf | 2015-01-03 | 1 | -4/+22 |
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| * | Progress in memory_bram | Clifford Wolf | 2015-01-03 | 1 | -11/+5 |
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| * | Added proper clkpol support to memory_bram | Clifford Wolf | 2015-01-02 | 1 | -4/+32 |
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| * | Progress in memory_bram | Clifford Wolf | 2015-01-02 | 1 | -3/+6 |
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| * | Progress in memory_bram | Clifford Wolf | 2015-01-02 | 1 | -1/+10 |
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| * | Progress in memory_bram | Clifford Wolf | 2015-01-01 | 1 | -22/+207 |
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| * | Progress in memory_bram | Clifford Wolf | 2015-01-01 | 1 | -37/+145 |
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| * | Progress in memory_bram | Clifford Wolf | 2014-12-31 | 1 | -7/+115 |
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| * | Added memory_bram (not functional yet) | Clifford Wolf | 2014-12-31 | 1 | -0/+285 |
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index : iCE40/yosys | |
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