Commit message (Collapse) | Author | Age | Files | Lines | |
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* | SigMap performance improvement | Clifford Wolf | 2016-02-01 | 1 | -1/+7 |
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* | Re-added SigMap::allbits() | Clifford Wolf | 2015-11-30 | 1 | -0/+9 |
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* | Improved SigMap performance | Clifford Wolf | 2015-10-28 | 1 | -5/+8 |
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* | Improvements in new SigMap | Clifford Wolf | 2015-10-28 | 1 | -5/+16 |
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* | Removed old SigMap implementation | Clifford Wolf | 2015-10-27 | 1 | -224/+0 |
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* | Added hashlib::mfp and new SigMap | Clifford Wolf | 2015-10-27 | 1 | -0/+91 |
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* | Added SigMap::allbits() | Clifford Wolf | 2015-08-31 | 1 | -0/+8 |
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* | Fixed trailing whitespaces | Clifford Wolf | 2015-07-02 | 1 | -2/+2 |
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* | Added "equiv_induct -undef" | Clifford Wolf | 2015-01-31 | 1 | -1/+1 |
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* | dict/pool changes in opt_clean | Clifford Wolf | 2014-12-29 | 1 | -0/+9 |
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* | Using Yosys::dict and Yosys::pool in sigtools.h | Clifford Wolf | 2014-12-26 | 1 | -4/+7 |
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* | Renamed SIZE() to GetSize() because of name collision on Win32 | Clifford Wolf | 2014-10-10 | 1 | -4/+4 |
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* | Added ModIndex helper class, some changes to RTLIL::Monitor | Clifford Wolf | 2014-08-01 | 1 | -0/+13 |
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* | Moved some stuff to kernel/yosys.{h,cc}, using Yosys:: namespace | Clifford Wolf | 2014-07-31 | 1 | -3/+5 |
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* | Using log_assert() instead of assert() | Clifford Wolf | 2014-07-28 | 1 | -7/+6 |
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* | Added SigPool::check(bit) | Clifford Wolf | 2014-07-27 | 1 | -0/+5 |
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* | Changed users of cell->connections_ to the new API (sed command) | Clifford Wolf | 2014-07-26 | 1 | -1/+1 |
| | | | | | | | | | git grep -l 'connections_' | xargs sed -i -r -e ' s/(->|\.)connections_\["([^"]*)"\] = (.*);/\1set("\2", \3);/g; s/(->|\.)connections_\["([^"]*)"\]/\1get("\2")/g; s/(->|\.)connections_.at\("([^"]*)"\)/\1get("\2")/g; s/(->|\.)connections_.push_back/\1connect/g; s/(->|\.)connections_/\1connections()/g;' | ||||
* | Renamed RTLIL::{Module,Cell}::connections to connections_ | Clifford Wolf | 2014-07-26 | 1 | -1/+1 |
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* | Removed RTLIL::SigSpec::expand() method | Clifford Wolf | 2014-07-23 | 1 | -145/+80 |
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* | Refactoring {SigSpec|SigChunk}(RTLIL::Wire *wire, ..) constructor -- step 3/3 | Clifford Wolf | 2014-07-23 | 1 | -2/+2 |
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* | Refactoring {SigSpec|SigChunk}(RTLIL::Wire *wire, ..) constructor -- step 2/3 | Clifford Wolf | 2014-07-23 | 1 | -2/+2 |
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* | SigSpec refactoring: More cleanups of old SigSpec use pattern | Clifford Wolf | 2014-07-22 | 1 | -54/+39 |
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* | SigSpec refactoring: change RTLIL::SigSpec::chunks() to be read-only, ↵ | Clifford Wolf | 2014-07-22 | 1 | -4/+4 |
| | | | | created interim RTLIL::SigSpec::chunks_rw() | ||||
* | SigSpec refactoring: using the accessor functions everywhere | Clifford Wolf | 2014-07-22 | 1 | -25/+25 |
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* | SigSpec refactoring: renamed chunks and width to __chunks and __width | Clifford Wolf | 2014-07-22 | 1 | -25/+25 |
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* | Some "const" cleanups in SigMap | Clifford Wolf | 2014-07-19 | 1 | -4/+4 |
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* | Some fixes to improve determinism | Clifford Wolf | 2013-08-09 | 1 | -2/+2 |
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* | Fixed SigPool::del() method | Clifford Wolf | 2013-08-06 | 1 | -1/+1 |
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* | Improved auto-detection of -show signals in sat_solve | Clifford Wolf | 2013-06-08 | 1 | -0/+24 |
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* | Added additional functionality and cleanups in sigtools.h and celltypes.h | Clifford Wolf | 2013-03-15 | 1 | -0/+24 |
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* | Implemented basic functionality of "extract" pass | Clifford Wolf | 2013-02-27 | 1 | -0/+14 |
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* | initial import | Clifford Wolf | 2013-01-05 | 1 | -0/+415 |