| Commit message (Collapse) | Author | Age | Files | Lines | ||
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| * | | Fitting help messages to 80 character width | KrystalDelusion | 2022-08-24 | 1 | -6/+6 | |
| |/ | | | | | | | | | Uses the regex below to search (using vscode): ^\t\tlog\("(.{10,}(?<!\\n)|.{81,}\\n)"\); Finds any log messages double indented (which help messages are) and checks if *either* there are is no newline character at the end, *or* the number of characters before the newline is more than 80. | |||||
| * | set default_nettype to wire for resetall | Miodrag Milanovic | 2022-08-10 | 1 | -0/+1 | |
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| * | resetall does not affect text defines, but undefineall does | Miodrag Milanovic | 2022-08-10 | 1 | -0/+4 | |
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| * | Encode filename unprintable chars | Miodrag Milanovic | 2022-08-08 | 3 | -27/+27 | |
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| * | verific - make filepath handling compatible with verilog frontend | Miodrag Milanovic | 2022-08-08 | 1 | -15/+29 | |
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| * | Merge pull request #3089 from YosysHQ/gatecat/liberty_wb | Miodrag Milanović | 2022-08-01 | 1 | -0/+14 | |
| |\ | | | | | Add read_liberty -wb | |||||
| | * | Add read_liberty -wb | gatecat | 2021-11-25 | 1 | -0/+14 | |
| | | | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | |||||
| * | | Setting wire upto in verific import | Miodrag Milanovic | 2022-07-29 | 1 | -2/+5 | |
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| * | | Update README | Miodrag Milanović | 2022-07-28 | 1 | -1/+1 | |
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| * | | Upadte documentation and changelog | Miodrag Milanovic | 2022-07-04 | 1 | -0/+1 | |
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| * | | Update to new verific extensions inteface | Miodrag Milanovic | 2022-06-30 | 1 | -3/+29 | |
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| * | | Add check for BLIF with no model name | Archie | 2022-06-22 | 1 | -1/+4 | |
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| * | | Revert "use new verific extensions library" | Miodrag Milanovic | 2022-06-21 | 1 | -70/+54 | |
| | | | | | | | | | This reverts commit 607e957657fc56625de5c28ea9cd43c859017d96. | |||||
| * | | use new verific extensions library | Miodrag Milanovic | 2022-06-17 | 1 | -54/+70 | |
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| * | | removed deprecated features code | Miodrag Milanovic | 2022-06-13 | 1 | -235/+0 | |
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| * | | verific: Added "-vlog-libext" option to specify search extension for libraries | Miodrag Milanovic | 2022-06-09 | 1 | -1/+16 | |
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| * | | verific: proper file location for readmem commands | Miodrag Milanovic | 2022-06-04 | 1 | -0/+33 | |
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| * | | verilog: fix width/sign detection for functions | Zachary Snow | 2022-05-30 | 1 | -5/+7 | |
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| * | | verilog: fix size and signedness of array querying functions | Jannis Harder | 2022-05-30 | 2 | -3/+2 | |
| | | | | | | | | | | | | | | | | | | | | | genrtlil.cc and simplify.cc had inconsistent and slightly broken handling of signedness for array querying functions. These functions are defined to return a signed result. Simplify always produced an unsigned and genrtlil always a signed 32-bit result ignoring the context. Includes tests for the the relvant edge cases for context dependent conversions. | |||||
| * | | verilog: fix $past's signedness | Jannis Harder | 2022-05-25 | 2 | -1/+2 | |
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| * | | verilog: fix signedness when removing unreachable cases | Jannis Harder | 2022-05-24 | 1 | -0/+1 | |
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| * | | fix text to fit 80 columns | Miodrag Milanovic | 2022-05-23 | 1 | -6/+9 | |
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| * | | Update verific command file documentation | Miodrag Milanovic | 2022-05-23 | 1 | -17/+19 | |
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| * | | Use analysis mode if set in file | Miodrag Milanovic | 2022-05-23 | 1 | -2/+2 | |
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| * | | verific: Use new value change logic also for $stable of wide signals. | Jannis Harder | 2022-05-11 | 1 | -7/+29 | |
| | | | | | | | | | I missed this in the previous PR. | |||||
| * | | Merge pull request #3305 from jix/sva_value_change_logic | Jannis Harder | 2022-05-09 | 1 | -10/+25 | |
| |\ \ | | | | | | | verific: Improve logic generated for SVA value change expressions | |||||
| | * | | verific: Improve logic generated for SVA value change expressions | Jannis Harder | 2022-05-09 | 1 | -10/+25 | |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The previously generated logic assumed an unconstrained past value in the initial state and did not handle 'x values. While the current formal verification flow uses 2-valued logic, SVA value change expressions require a past value of 'x during the initial state to behave in the expected way (i.e. to consider both an initial 0 and an initial 1 as $changed and an initial 1 as $rose and an initial 0 as $fell). This patch now generates logic that at the same time a) provides the expected behavior in a 2-valued logic setting, not depending on any dont-care optimizations, and b) properly handles 'x values in yosys simulation | |||||
| * | | | verific: Fix conditions of SVAs with explicit clocks within procedures | Jannis Harder | 2022-05-03 | 3 | -5/+16 | |
| |/ / | | | | | | | | | | | | | | | | | For SVAs that have an explicit clock and are contained in a procedure which conditionally executes the assertion, verific expresses this using a mux with one input connected to constant 1 and the other output connected to an SVA_AT. The existing code only handled the case where the first input is connected to 1. This patch also handles the other case. | |||||
| * | | Ignore merging past ffs that we are not properly merging | Miodrag Milanovic | 2022-04-29 | 1 | -0/+1 | |
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| * | | verific: allow memories to be inferred in loops (vhdl) | Miodrag Milanovic | 2022-04-18 | 1 | -0/+1 | |
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| * | | verific: allow memories to be inferred in loops | N. Engelhardt | 2022-04-15 | 1 | -0/+1 | |
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| * | | sv: fix always_comb auto nosync for nested and function blocks | Zachary Snow | 2022-04-05 | 1 | -1/+11 | |
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| * | | Preserve internal wires for external nets | Miodrag Milanovic | 2022-04-01 | 1 | -1/+1 | |
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| * | | Fix valgrind tests when using verific | Miodrag Milanovic | 2022-03-30 | 1 | -0/+8 | |
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| * | | Properly mark modules imported | Miodrag Milanovic | 2022-03-26 | 1 | -2/+2 | |
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| * | | Import verific netlist in consistent order | Miodrag Milanovic | 2022-03-25 | 2 | -23/+27 | |
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| * | | Merge pull request #3206 from YosysHQ/micko/quote_remove | Miodrag Milanović | 2022-03-04 | 1 | -1/+4 | |
| |\ \ | | | | | | | Remove quotes if any from attribute | |||||
| | * | | Remove quotes if any from attribute | Miodrag Milanovic | 2022-02-16 | 1 | -1/+4 | |
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| * | | | fix handling of escaped chars in json backend and frontend | N. Engelhardt | 2022-02-18 | 1 | -3/+31 | |
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| * | | verilog: support for time scale delay values | Zachary Snow | 2022-02-14 | 2 | -4/+16 | |
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| * | | Fix access to whole sub-structs (#3086) | Kamil Rakoczy | 2022-02-14 | 2 | -6/+18 | |
| | | | | | | | | | | | | | * Add support for accessing whole struct * Update tests Signed-off-by: Kamil Rakoczy <krakoczy@antmicro.com> | |||||
| * | | verilog: fix dynamic dynamic range asgn elab | Zachary Snow | 2022-02-11 | 1 | -17/+34 | |
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| * | | verilog: fix const func eval with upto variables | Zachary Snow | 2022-02-11 | 2 | -3/+11 | |
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| * | | Merge pull request #3164 from zachjs/fix-ast-warn | Miodrag Milanović | 2022-02-11 | 1 | -1/+1 | |
| |\ \ | | | | | | | fix dumpAst() compilation warning | |||||
| | * | | fix dumpAst() compilation warning | Zachary Snow | 2022-01-18 | 1 | -1/+1 | |
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| * | | | Add ability to override verilog mode for verific -f command | Miodrag Milanovic | 2022-02-09 | 1 | -2/+44 | |
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| * | | | Use bmux for NTO1MUX | Miodrag Milanovic | 2022-02-02 | 1 | -16/+2 | |
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| * | | sv: auto add nosync to certain always_comb local vars | Zachary Snow | 2022-01-07 | 1 | -0/+127 | |
| | | | | | | | | | | | If a local variable is always assigned before it is used, then adding nosync prevents latches from being needlessly generated. | |||||
| * | | sv: fix size cast internal expression extension | Zachary Snow | 2022-01-07 | 1 | -2/+9 | |
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| * | | sv: fix size cast clipping expression width | Zachary Snow | 2022-01-03 | 1 | -1/+2 | |
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index : iCE40/yosys | |
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