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* remove include where not usedMiodrag Milanovic2020-03-131-1/+0
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* Merge pull request #1258 from YosysHQ/eddie/cleanupClifford Wolf2019-08-101-5/+5
|\ | | | | Cleanup a few barnacles across codebase
| * substr() -> compare()Eddie Hung2019-08-071-1/+1
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| * Merge remote-tracking branch 'origin/master' into eddie/cleanupEddie Hung2019-08-071-93/+203
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| * | Use IdString::begins_with()Eddie Hung2019-08-061-2/+2
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| * | Use State::S{0,1}Eddie Hung2019-08-061-2/+2
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* | | Merge branch 'master' into firrtl_err_on_unsupported_cellJim Lawson2019-08-071-93/+203
|\ \ \ | | |/ | |/| | | | | | | # Conflicts: # backends/firrtl/firrtl.cc
| * | Support explicit FIRRTL properties for better accommodation of ↵Jim Lawson2019-07-311-93/+203
| |/ | | | | | | | | | | | | | | | | FIRRTL/Verilog semantic differences. Use FIRRTL spec vlaues for definition of FIRRTL widths. Added support for '$pos`, `$pow` and `$xnor` cells. Enable tests/simple/operators.v since all operators tested there are now supported. Disable FIRRTL tests of tests/simple/{defvalue.sv,implicit_ports.v,wandwor.v} since they currently generate FIRRTL compilation errors.
* / Call log_error() instead of log_warning() on unsupported cell type in FIRRTL ↵Jim Lawson2019-07-241-1/+1
|/ | | | backend.
* Fix static shift operands, neg result type, minor formattingJim Lawson2019-05-211-3/+7
| | | | | | Static shift operands must be constants. The result of FIRRTL's neg operator is signed. Fix poor indentation for gen_read().
* Fix all warnings that occurred when compiling with gcc9Kristoffer Ellersgaard Koch2019-05-081-1/+2
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* Re-indent firrtl.cc:struct memory - no functional change.Jim Lawson2019-05-011-25/+25
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* Fix #938 - Crash occurs in case when use write_firrtl commandJim Lawson2019-05-011-4/+41
| | | | | | Add missing memory initialization. Sanity-check memory parameters. Add Cell pointer to memory object (for error reporting).
* Refine memory support to deal with general Verilog memory definitions.Jim Lawson2019-04-011-30/+173
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* Ensure fid() calls make_id() for consistency; tests/simple/dff_init.v failsJim Lawson2019-03-041-2/+1
| | | | Mark dff_init.v as expected to fail since it uses "initial value".
* Fix FIRRTL to Verilog process instance subfield assignment.Jim Lawson2019-02-251-8/+20
| | | | | | Don't emit subfield assignments: bits(x, y, z) <= ... - but instead, add them to the reverse-wire-map where they'll be treated at the end of the module. Enable tests which were disabled due to incorrect treatment of subfields. Assume the `$firrtl2verilog` variable contains any additional switches to control verilog generation (i.e. `--no-dedup -X mverilog`)
* Removed unused variables, functions.Jim Lawson2019-02-151-20/+0
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* Update cells supported for verilog to FIRRTL conversion.Jim Lawson2019-02-151-48/+225
| | | | | | | | | | | | | Issue warning messages for missing parameterized modules and attempts to set initial values. Replace simple "if (cell-type)" with "else if" chain. Fix FIRRTL shift handling. Add support for parameterized modules, $shift, $shiftx. Handle default output file. Deal with no top module. Automatically run pmuxtree pass. Allow EXTRA_FLAGS and SEED parameters to be set in the environment for tests/tools/autotest.mk. Support FIRRTL regression testing in tests/tools/autotest.sh Add xfirrtl files to test directories to exclude files from FIRRTL regression tests that are known to fail.
* added prefix to FDirection constants, fixing windows buildMiodrag Milanovic2018-09-211-11/+11
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* Remove unused functions.Jim Lawson2018-08-271-10/+0
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* Add support for module instances.Jim Lawson2018-08-231-17/+122
| | | | | | | Don't pad logical operands to one bit. Use operand width and signedness in $reduce_bool. Shift amounts are unsigned and shouldn't be padded. Group "is invalid" with the wire declaration, not its use (otherwise it is incorrectly wired to 0).
* Consistent use of 'override' for virtual methods in derived classes.Henner Zeller2018-07-201-2/+2
| | | | | | | | | o Not all derived methods were marked 'override', but it is a great feature of C++11 that we should make use of. o While at it: touched header files got a -*- c++ -*- for emacs to provide support for that language. o use YS_OVERRIDE for all override keywords (though we should probably use the plain keyword going forward now that C++11 is established)
* More progress on Firrtl backend.Adam Izraelevitz2017-02-133-27/+181
| | | | | Chisel -> Firrtl -> Verilog -> Firrtl -> Verilog is successful for a simple rocket-chip design.
* Bugfix: include assign to write-maskAdam Izraelevitz2016-11-181-0/+1
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* More progress in FIRRTL back-endClifford Wolf2016-11-183-4/+121
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* Progress in FIRRTL back-endClifford Wolf2016-11-184-5/+55
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* Added first draft of FIRRTL back-endClifford Wolf2016-11-172-0/+353
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