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* verific set db_infer_set_reset_registersMiodrag Milanovic2021-10-041-0/+1
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* Bump versiongithub-actions[bot]2021-10-031-1/+1
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* Hook up $aldff support in various passes.Marcelina Kościelnicka2021-10-029-11/+77
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* zinit: Refactor to use FfData.Marcelina Kościelnicka2021-10-021-101/+38
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* kernel/ff: Refactor FfData to enable FFs with async load.Marcelina Kościelnicka2021-10-0210-325/+565
| | | | | | | | | | - *_en is split into *_ce (clock enable) and *_aload (async load aka latch gate enable), so both can be present at once - has_d is removed - has_gclk is added (to have a clear marker for $ff) - d_is_const and val_d leftovers are removed - async2sync, clk2fflogic, opt_dff are updated to operate correctly on FFs with async load
* Add $aldff and $aldffe: flip-flops with async load.Marcelina Kościelnicka2021-10-029-2/+527
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* Specify minimum bison version 3.0+Zachary Snow2021-10-012-0/+4
| | | | | | | | | Yosys works with bison 3.0 (or newer), but not bison 2.7 (the previous release). Ideally, we would require "3" rather than "3.0" to give a better error message, but bison 2.3, which still ships with macOS, does not support major-only version requirements. With this change, building with an outdated bison yields: `frontends/rtlil/rtlil_parser.y:25.10-14: require bison 3.0, but have 2.3`.
* simplemap: refactor to use FfData.Marcelina Kościelnicka2021-10-023-290/+26
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* Merge pull request #3017 from YosysHQ/claire/short_rtlil_x_constMiodrag Milanović2021-09-281-9/+13
|\ | | | | Add optimization to rtlil back-end for all-x parameter values
| * Add optimization to rtlil back-end for all-x parameter valuesClaire Xenia Wolf2021-09-271-9/+13
| | | | | | | | Signed-off-by: Claire Xenia Wolf <claire@clairexen.net>
* | Bump versiongithub-actions[bot]2021-09-281-1/+1
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* | Prepare for next release cycleMiodrag Milanovic2021-09-272-3/+6
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* Bump versiongithub-actions[bot]2021-09-251-1/+1
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* Merge pull request #3014 from YosysHQ/claire/fix-vgtestClaire Xen2021-09-2441-79/+80
|\ | | | | Fix "make vgtest"
| * Fix TOK_ID memory leak in for_initializationZachary Snow2021-09-231-0/+1
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| * Fix "make vgtest" so it runs to the end (but now it fails ;)Claire Xenia Wolf2021-09-2340-79/+79
| | | | | | | | Signed-off-by: Claire Xenia Wolf <claire@clairexen.net>
* | Bump versiongithub-actions[bot]2021-09-221-1/+1
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* | sv: support wand and wor of data typesZachary Snow2021-09-214-10/+53
| | | | | | | | | | | | This enables the usage of declarations of wand or wor with a base type of logic, integer, or a typename. Note that declarations of nets with 2-state base types is still permitted, in violation of the spec.
* | verilog: fix multiple AST_PREFIX scope resolution issuesZachary Snow2021-09-214-4/+110
|/ | | | | | | | - Root AST_PREFIX nodes are now subject to genblk expansion to allow them to refer to a locally-visible generate block - Part selects on AST_PREFIX member leafs can now refer to generate block items (previously would not resolve and raise an error) - Add source location information to AST_PREFIX nodes
* Bump versiongithub-actions[bot]2021-09-191-1/+1
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* Merge pull request #3010 from the6p4c/masterMiodrag Milanović2021-09-181-0/+2
|\ | | | | Fix protobuf backend build dependencies - intermittent build issue due to missing rule
| * Fix protobuf backend build dependenciesthe6p4c2021-09-171-0/+2
|/ | | | | | | backends/protobuf/protobuf.cc depends on the source and header files generated by protoc, but this dependency wasn't explicitly declared. Add a rule to the Makefile to fix intermittent build failures when the protobuf header/source file isn't built before protobuf.cc.
* Bump versiongithub-actions[bot]2021-09-141-1/+1
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* verilog: Squash flex-triggered warning.Marcelina Kościelnicka2021-09-131-0/+2
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* Updates for CHANGELOG (#2997)Miodrag Milanović2021-09-131-48/+126
| | | Added missing changes from git log and group items
* Bump versiongithub-actions[bot]2021-09-111-1/+1
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* Merge pull request #3001 from YosysHQ/claire/sigcheckMiodrag Milanović2021-09-102-6/+14
|\ | | | | Add additional check to SigSpec
| * Add additional check to SigSpecClaire Xenia Wolf2021-09-102-6/+14
|/ | | | Signed-off-by: Claire Xenia Wolf <claire@clairexen.net>
* yosys-smtbmc: Fix reused loop variable.Marcelina Kościelnicka2021-09-101-4/+4
| | | | Fixes #2999.
* Bump versiongithub-actions[bot]2021-09-101-1/+1
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* abc9: make re-entrant (#2993)Eddie Hung2021-09-093-9/+29
| | | | | | | | | * Add testcase * Cleanup some state at end of abc9 * Re-assign abc9_box_id from scratch * Suppress delete unless prep_bypass did something
* abc9: holes module to instantiate cells with NEW_ID (#2992)Eddie Hung2021-09-092-1/+15
| | | | | * Add testcase * holes module to instantiate cells with NEW_ID
* abc9: replace cell type/parameters if derived type already processed (#2991)Eddie Hung2021-09-093-7/+30
| | | | | | | | | | | * Add close bracket * Add testcase * Replace cell type/param if in unmap_design * Improve abc9_box error message too * Update comment as per review
* Bump versiongithub-actions[bot]2021-09-031-1/+1
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* update required verific versionMiodrag Milanovic2021-09-021-1/+1
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* Bump versiongithub-actions[bot]2021-09-011-1/+1
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* sv: support declaration in generate for initializationZachary Snow2021-08-319-1/+209
| | | | | | | | This is accomplished by generating a unique name for the genvar, renaming references to the genvar only in the loop's initialization, guard, and incrementation, and finally adding a localparam inside the loop body with the original name so that the genvar can be shadowed as expected.
* Bump versiongithub-actions[bot]2021-08-311-1/+1
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* sv: support declaration in procedural for initializationZachary Snow2021-08-305-1/+104
| | | | | In line with other tools, this adds an extra wrapping block around such for loops to appropriately scope the variable.
* Bump versiongithub-actions[bot]2021-08-301-1/+1
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* [ECP5] fix wrong link for syn_* attributes description (#2984)kittennbfive2021-08-292-2/+2
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* Bump versiongithub-actions[bot]2021-08-231-1/+1
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* Add DLLDELDECP5-PCIe2021-08-221-0/+9
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* opt_merge: Remove and reinsert init when connecting nets.Marcelina Kościelnicka2021-08-221-3/+4
| | | | | | | | Mutating the SigMap by adding a new connection will throw off FfInitVals index. Work around this by removing the relevant init values from index whenever we connect nets, then re-add the new init value. Should fix #2920.
* opt_clean: Make the init attribute follow the FF's Q.Marcelina Kościelnicka2021-08-222-2/+26
| | | | | | | | | | Previously, opt_clean would reconnect all ports (including FF Q ports) to a "canonical" SigBit chosen by complex rules, but would leave the init attribute on the old wire. This change applies the same canonicalization rules to the init attributes, ensuring that init moves to wherever the Q port moved. Part of another jab at #2920.
* Bump versiongithub-actions[bot]2021-08-211-1/+1
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* Gowin: deal with active-low tristate (#2971)Pepijn de Vos2021-08-205-7/+15
| | | | | | | | | * deal with active-low tristate * remove empty port * update sim models * add expected lut1 to tests
* Merge pull request #2973 from YosysHQ/micko/optional_extensionsMiodrag Milanović2021-08-202-2/+12
|\ | | | | Make Verific extensions optional
| * Make Verific extensions optionalMiodrag Milanovic2021-08-202-2/+12
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* Bump versiongithub-actions[bot]2021-08-181-1/+1
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