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* Added delete commandClifford Wolf2014-02-022-0/+135
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* Added suuport for module attribute matching with A:<pattern>[=<pattern>] syntaxClifford Wolf2014-02-021-5/+22
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* presentation progressClifford Wolf2014-02-022-10/+20
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* presentation progressClifford Wolf2014-02-021-10/+158
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* Added support for blanks after -I and -D in read_verilogClifford Wolf2014-02-021-7/+20
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* Fixed a bug in miter commandClifford Wolf2014-02-011-2/+2
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* Added sat -show-inputs and -show-outputsClifford Wolf2014-02-011-1/+24
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* Added show -color support for cells and finished show -label implementationClifford Wolf2014-02-011-13/+36
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* Fixed comment/eol parsing in ilang frontendClifford Wolf2014-02-012-22/+25
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* Added constant size expression support of sized constantsClifford Wolf2014-02-016-0/+48
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* Added note about SystemVerilog assert statement to READMEClifford Wolf2014-02-011-0/+5
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* Added miter commandClifford Wolf2014-02-012-0/+307
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* Progress on presentationClifford Wolf2014-01-313-5/+194
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* More changes to techlibs/common/simlib.v for LECClifford Wolf2014-01-311-6/+11
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* presentation progressClifford Wolf2014-01-302-7/+157
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* Bugfix in name resolution with generate blocksClifford Wolf2014-01-302-1/+25
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* Added yosys -H for command listClifford Wolf2014-01-301-1/+7
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* presentation progressClifford Wolf2014-01-292-4/+36
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* presentation progressClifford Wolf2014-01-2910-2/+174
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* Tiny change in example script in READMEClifford Wolf2014-01-291-1/+1
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* Added -h command line optionClifford Wolf2014-01-291-2/+8
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* Added test comments to techlibs/cmos/cmos_cells.libClifford Wolf2014-01-291-0/+2
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* Updated ABC to hg rev e6b09e1Clifford Wolf2014-01-291-1/+1
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* Added read_verilog -icells optionClifford Wolf2014-01-294-6/+20
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* Major rewrite of techlibs/common/simlib.v for LEC (cadance conformal)Clifford Wolf2014-01-291-105/+305
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* presentation progressClifford Wolf2014-01-282-4/+237
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* Renamed manual/FILES_* directoriesClifford Wolf2014-01-2829-9/+9
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* Progress on presentationClifford Wolf2014-01-282-8/+69
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* Progress on presentationClifford Wolf2014-01-272-5/+79
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* Added first presentation slidesClifford Wolf2014-01-277-1/+105
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* Merge branch 'btor' of https://github.com/ahmedirfan1983/yosysClifford Wolf2014-01-261-1/+5
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| * root bug correctedAhmed Irfan2014-01-251-1/+5
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* | Merge pull request #21 from hansiglaser/masterClifford Wolf2014-01-252-17/+34
|\ \ | | | | | | beautified write_intersynth, enabled multiple "-map" for the extract pass
| * | enabled multiple "-map" for the extract passJohann Glaser2014-01-251-17/+25
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| * | beautified write_intersynthJohann Glaser2014-01-251-0/+9
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* | Added support for // comments in liberty parserClifford Wolf2014-01-251-0/+5
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* | Merge branch 'btor'Clifford Wolf2014-01-245-0/+1026
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| * removed regex includeAhmed Irfan2014-01-241-1/+0
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| * merged clifford changes + removed regexAhmed Irfan2014-01-241-26/+52
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| * Use techmap -share_map in btor scriptsClifford Wolf2014-01-242-2/+2
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| * Moved btor scripts to backends/btor/Clifford Wolf2014-01-242-0/+0
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| * Restored MakefileClifford Wolf2014-01-241-3/+3
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| * Restored IdString::check()Clifford Wolf2014-01-241-1/+1
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| * Merge branch 'btor' of https://github.com/ahmedirfan1983/yosys into btorClifford Wolf2014-01-247-4/+1005
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| * minor change in scriptAhmed Irfan2014-01-241-2/+11
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| * Merge branch 'master' of https://github.com/cliffordwolf/yosys into btorAhmed Irfan2014-01-223-6/+13
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| * | slice bug correctedAhmed Irfan2014-01-201-1/+1
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| * | assert featureAhmed Irfan2014-01-201-9/+40
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| * | Merge branch 'master' of https://github.com/cliffordwolf/yosys into btorAhmed Irfan2014-01-2016-33/+349
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| * | | script addedAhmed Irfan2014-01-182-9/+28
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