aboutsummaryrefslogtreecommitdiffstats
path: root/tests/xilinx_ug901/latches.ys
diff options
context:
space:
mode:
Diffstat (limited to 'tests/xilinx_ug901/latches.ys')
-rw-r--r--tests/xilinx_ug901/latches.ys10
1 files changed, 0 insertions, 10 deletions
diff --git a/tests/xilinx_ug901/latches.ys b/tests/xilinx_ug901/latches.ys
deleted file mode 100644
index be4a8de94..000000000
--- a/tests/xilinx_ug901/latches.ys
+++ /dev/null
@@ -1,10 +0,0 @@
-read_verilog latches.v
-proc
-hierarchy -top latches
-flatten
-synth_xilinx
-#Vivado synthesizes 1 BUFG, 8 LDCE.
-select -assert-count 2 t:LUT2
-select -assert-count 1 t:$_DLATCH_P_
-#ERROR: Assertion failed: selection is not empty: t:LUT2 t:$_DLATCH_P_ %% t:* %D
-#select -assert-none t:LUT2 t:$_DLATCH_P_ %% t:* %D