1 files changed, 14 insertions, 96 deletions
diff --git a/techlibs/xilinx/abc_model.v b/techlibs/xilinx/abc_model.v
index 4310ad39e..a8f6deafc 100644
--- a/techlibs/xilinx/abc_model.v
+++ b/techlibs/xilinx/abc_model.v
@@ -75,20 +75,18 @@ endmodule
 //    B >>------|         |
 //              +---------+
 //
-(* abc_box_id=2100 *)
-module \$__ABC_DSP48E1_MULT_P_MUX (input Aq, ADq, Bq, Cq, Dq, Mq, input [47:0] P, input Pq, output [47:0] O);
-endmodule
-(* abc_box_id=2101 *)
-module \$__ABC_DSP48E1_MULT_PCOUT_MUX (input Aq, ADq, Bq, Cq, Dq, Mq, input [47:0] P, input Pq, output [47:0] O);
-endmodule
-(* abc_box_id=2102 *)
-module \$__ABC_DSP48E1_MULT_DPORT_P_MUX (input Aq, ADq, Bq, Cq, Dq, Mq, input [47:0] P, input Pq, output [47:0] O);
-endmodule
-(* abc_box_id=2103 *)
-module \$__ABC_DSP48E1_MULT_DPORT_PCOUT_MUX (input Aq, ADq, Bq, Cq, Dq, Mq, input [47:0] P, input Pq, output [47:0] O);
+`define ABC_DSP48E1_MUX(__NAME__) """
+module __NAME__ (input Aq, ADq, Bq, Cq, Dq, Mq, input [47:0] P, input Pq, output [47:0] O);
 endmodule
+"""
+(* abc_box_id=2100 *) `ABC_DSP48E1_MUX(\$__ABC_DSP48E1_MULT_P_MUX )
+(* abc_box_id=2101 *) `ABC_DSP48E1_MUX(\$__ABC_DSP48E1_MULT_PCOUT_MUX )
+(* abc_box_id=2102 *) `ABC_DSP48E1_MUX(\$__ABC_DSP48E1_MULT_DPORT_P_MUX )
+(* abc_box_id=2103 *) `ABC_DSP48E1_MUX(\$__ABC_DSP48E1_MULT_DPORT_PCOUT_MUX )
+(* abc_box_id=2104 *) `ABC_DSP48E1_MUX(\$__ABC_DSP48E1_P_MUX )
+(* abc_box_id=2105 *) `ABC_DSP48E1_MUX(\$__ABC_DSP48E1_PCOUT_MUX )
 
-(* abc_box_id=3000 *)
+`define ABC_DSP48E1(__NAME__) """
 module \$__ABC_DSP48E1_MULT (
     output [29:0] ACOUT,
     output [17:0] BCOUT,
@@ -171,87 +169,7 @@ module \$__ABC_DSP48E1_MULT (
     parameter [4:0] IS_INMODE_INVERTED = 5'b0;
     parameter [6:0] IS_OPMODE_INVERTED = 7'b0;
 endmodule
-
-(* abc_box_id=3001 *)
-module \$__ABC_DSP48E1_MULT_DPORT (
-    output [29:0] ACOUT,
-    output [17:0] BCOUT,
-    output reg CARRYCASCOUT,
-    output reg [3:0] CARRYOUT,
-    output reg MULTSIGNOUT,
-    output OVERFLOW,
-    output reg signed [47:0] P,
-    output PATTERNBDETECT,
-    output PATTERNDETECT,
-    output [47:0] PCOUT,
-    output UNDERFLOW,
-    input signed [29:0] A,
-    input [29:0] ACIN,
-    input [3:0] ALUMODE,
-    input signed [17:0] B,
-    input [17:0] BCIN,
-    input [47:0] C,
-    input CARRYCASCIN,
-    input CARRYIN,
-    input [2:0] CARRYINSEL,
-    input CEA1,
-    input CEA2,
-    input CEAD,
-    input CEALUMODE,
-    input CEB1,
-    input CEB2,
-    input CEC,
-    input CECARRYIN,
-    input CECTRL,
-    input CED,
-    input CEINMODE,
-    input CEM,
-    input CEP,
-    input CLK,
-    input [24:0] D,
-    input [4:0] INMODE,
-    input MULTSIGNIN,
-    input [6:0] OPMODE,
-    input [47:0] PCIN,
-    input RSTA,
-    input RSTALLCARRYIN,
-    input RSTALUMODE,
-    input RSTB,
-    input RSTC,
-    input RSTCTRL,
-    input RSTD,
-    input RSTINMODE,
-    input RSTM,
-    input RSTP
-);
-    parameter integer ACASCREG = 1;
-    parameter integer ADREG = 1;
-    parameter integer ALUMODEREG = 1;
-    parameter integer AREG = 1;
-    parameter AUTORESET_PATDET = "NO_RESET";
-    parameter A_INPUT = "DIRECT";
-    parameter integer BCASCREG = 1;
-    parameter integer BREG = 1;
-    parameter B_INPUT = "DIRECT";
-    parameter integer CARRYINREG = 1;
-    parameter integer CARRYINSELREG = 1;
-    parameter integer CREG = 1;
-    parameter integer DREG = 1;
-    parameter integer INMODEREG = 1;
-    parameter integer MREG = 1;
-    parameter integer OPMODEREG = 1;
-    parameter integer PREG = 1;
-    parameter SEL_MASK = "MASK";
-    parameter SEL_PATTERN = "PATTERN";
-    parameter USE_DPORT = "FALSE";
-    parameter USE_MULT = "MULTIPLY";
-    parameter USE_PATTERN_DETECT = "NO_PATDET";
-    parameter USE_SIMD = "ONE48";
-    parameter [47:0] MASK = 48'h3FFFFFFFFFFF;
-    parameter [47:0] PATTERN = 48'h000000000000;
-    parameter [3:0] IS_ALUMODE_INVERTED = 4'b0;
-    parameter [0:0] IS_CARRYIN_INVERTED = 1'b0;
-    parameter [0:0] IS_CLK_INVERTED = 1'b0;
-    parameter [4:0] IS_INMODE_INVERTED = 5'b0;
-    parameter [6:0] IS_OPMODE_INVERTED = 7'b0;
-endmodule
+"""
+(* abc_box_id=3000 *) `ABC_DSP48E1(\$__ABC_DSP48E1_MULT )
+(* abc_box_id=3001 *) `ABC_DSP48E1(\$__ABC_DSP48E1_MULT_DPORT )
+(* abc_box_id=3002 *) `ABC_DSP48E1(\$__ABC_DSP48E1 )