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-rw-r--r--techlibs/intel/Makefile.inc2
1 files changed, 1 insertions, 1 deletions
diff --git a/techlibs/intel/Makefile.inc b/techlibs/intel/Makefile.inc
index 4e8f423c8..d97a9b58f 100644
--- a/techlibs/intel/Makefile.inc
+++ b/techlibs/intel/Makefile.inc
@@ -7,7 +7,7 @@ $(eval $(call add_share_file,share/intel/common,techlibs/intel/common/brams_m9k.
$(eval $(call add_share_file,share/intel/common,techlibs/intel/common/brams_map_m9k.v))
# Add the cell models and mappings for the VQM backend
-families := max10 a10gx cyclonev cyclone10 cycloneiv cycloneive
+families := max10 arria10gx cyclonev cyclone10lp cycloneiv cycloneive
$(foreach family,$(families), $(eval $(call add_share_file,share/intel/$(family),techlibs/intel/$(family)/cells_sim.v)))
$(foreach family,$(families), $(eval $(call add_share_file,share/intel/$(family),techlibs/intel/$(family)/cells_map.v)))
#$(eval $(call add_share_file,share/intel/cycloneive,techlibs/intel/cycloneive/arith_map.v))