diff options
Diffstat (limited to 'techlibs/ice40/synth_ice40.cc')
| -rw-r--r-- | techlibs/ice40/synth_ice40.cc | 25 |
1 files changed, 13 insertions, 12 deletions
diff --git a/techlibs/ice40/synth_ice40.cc b/techlibs/ice40/synth_ice40.cc index ed7a16c08..d92e40726 100644 --- a/techlibs/ice40/synth_ice40.cc +++ b/techlibs/ice40/synth_ice40.cc @@ -65,7 +65,7 @@ struct SynthIce40Pass : public ScriptPass log(" do not flatten design before synthesis\n"); log("\n"); log(" -retime\n"); - log(" run 'abc' with -dff option\n"); + log(" run 'abc' with '-dff -D 1' options\n"); log("\n"); log(" -nocarry\n"); log(" do not use SB_CARRY cells in output netlist\n"); @@ -102,8 +102,8 @@ struct SynthIce40Pass : public ScriptPass log("\n"); } - string top_opt, blif_file, edif_file, json_file, abc, device_opt; - bool nocarry, nodffe, nobram, dsp, flatten, retime, noabc, abc2, vpr; + string top_opt, blif_file, edif_file, json_file, device_opt; + bool nocarry, nodffe, nobram, dsp, flatten, retime, noabc, abc2, vpr, abc9; int min_ce_use; void clear_flags() YS_OVERRIDE @@ -122,7 +122,7 @@ struct SynthIce40Pass : public ScriptPass noabc = false; abc2 = false; vpr = false; - abc = "abc"; + abc9 = false; device_opt = "hx"; } @@ -207,7 +207,7 @@ struct SynthIce40Pass : public ScriptPass continue; } if (args[argidx] == "-abc9") { - abc = "abc9"; + abc9 = true; continue; } if (args[argidx] == "-device" && argidx+1 < args.size()) { @@ -223,7 +223,7 @@ struct SynthIce40Pass : public ScriptPass if (device_opt != "hx" && device_opt != "lp" && device_opt !="u") log_cmd_error("Invalid or no device specified: '%s'\n", device_opt.c_str()); - if (abc == "abc9" && retime) + if (abc9 && retime) log_cmd_error("-retime option not currently compatible with -abc9!\n"); log_header(design, "Executing SYNTH_ICE40 pass.\n"); @@ -273,7 +273,8 @@ struct SynthIce40Pass : public ScriptPass run("opt_expr"); run("opt_clean"); if (help_mode || dsp) { - run("memory_dff"); + run("memory_dff"); // ice40_dsp will merge registers, reserve memory port registers first + run("wreduce t:$mul"); run("techmap -map +/mul2dsp.v -map +/ice40/dsp_map.v -D DSP_A_MAXWIDTH=16 -D DSP_B_MAXWIDTH=16 " "-D DSP_A_MINWIDTH=2 -D DSP_B_MINWIDTH=2 -D DSP_Y_MINWIDTH=11 " "-D DSP_NAME=$__MUL16X16", "(if -dsp)"); @@ -316,7 +317,7 @@ struct SynthIce40Pass : public ScriptPass run("techmap -map +/techmap.v -map +/ice40/arith_map.v"); } if (retime || help_mode) - run(abc + " -dff", "(only if -retime)"); + run("abc -dff -D 1", "(only if -retime)"); run("ice40_opt"); } @@ -340,7 +341,7 @@ struct SynthIce40Pass : public ScriptPass if (check_label("map_luts")) { if (abc2 || help_mode) { - run(abc, " (only if -abc2)"); + run("abc", " (only if -abc2)"); run("ice40_opt", "(only if -abc2)"); } run("techmap -map +/ice40/latches_map.v"); @@ -349,7 +350,7 @@ struct SynthIce40Pass : public ScriptPass run("techmap -map +/gate2lut.v -D LUT_WIDTH=4", "(only if -noabc)"); } if (!noabc) { - if (abc == "abc9") { + if (abc9) { run("read_verilog -icells -lib +/ice40/abc9_model.v"); int wire_delay; if (device_opt == "lp") @@ -358,10 +359,10 @@ struct SynthIce40Pass : public ScriptPass wire_delay = 750; else wire_delay = 250; - run(abc + stringf(" -W %d -lut +/ice40/abc9_%s.lut -box +/ice40/abc9_%s.box", wire_delay, device_opt.c_str(), device_opt.c_str()), "(skip if -noabc)"); + run(stringf("abc9 -W %d -lut +/ice40/abc9_%s.lut -box +/ice40/abc9_%s.box", wire_delay, device_opt.c_str(), device_opt.c_str())); } else - run(abc + " -dress -lut 4", "(skip if -noabc)"); + run("abc -dress -lut 4", "(skip if -noabc)"); } run("ice40_wrapcarry -unwrap"); run("techmap -D NO_LUT -map +/ice40/cells_map.v"); |