2 files changed, 5 insertions, 7 deletions
diff --git a/techlibs/common/abc9_map.v b/techlibs/common/abc9_map.v
index 57b3831d8..182915842 100644
--- a/techlibs/common/abc9_map.v
+++ b/techlibs/common/abc9_map.v
@@ -3,10 +3,10 @@
 module $_DFF_x_(input C, D, output Q);
   parameter [0:0] _TECHMAP_WIREINIT_Q_ = 1'bx;
   parameter _TECHMAP_CELLTYPE_ = "";
-  wire D_;
+  (* init=_TECHMAP_WIREINIT_Q_ *) wire D_;
   generate if (_TECHMAP_CELLTYPE_ == "$_DFF_N_") begin
     if (_TECHMAP_WIREINIT_Q_ === 1'b0) begin
-      $__DFF_N__$abc9_flop #(.INIT(_TECHMAP_WIREINIT_Q_)) _TECHMAP_REPLACE_ (.C(C), .D(D), .Q(Q), .n1(D_));
+      $__DFF_N__$abc9_flop _TECHMAP_REPLACE_ (.C(C), .D(D), .Q(Q), .n1(D_));
       $_DFF_N_ ff (.C(C), .D(D_), .Q(Q));
     end
     else
@@ -14,7 +14,7 @@ module $_DFF_x_(input C, D, output Q);
   end
   else if (_TECHMAP_CELLTYPE_ == "$_DFF_P_") begin
     if (_TECHMAP_WIREINIT_Q_ === 1'b0) begin
-      $__DFF_P__$abc9_flop #(.INIT(_TECHMAP_WIREINIT_Q_)) _TECHMAP_REPLACE_ (.C(C), .D(D), .Q(Q), .n1(D_));
+      $__DFF_P__$abc9_flop _TECHMAP_REPLACE_ (.C(C), .D(D), .Q(Q), .n1(D_));
       $_DFF_P_ ff (.C(C), .D(D_), .Q(Q));
     end
     else
diff --git a/techlibs/common/abc9_model.v b/techlibs/common/abc9_model.v
index a86f6a436..4fee60f75 100644
--- a/techlibs/common/abc9_model.v
+++ b/techlibs/common/abc9_model.v
@@ -7,8 +7,7 @@ module $__ABC9_DELAY (input I, output O);
 endmodule
 
 (* abc9_flop, abc9_box, lib_whitebox *)
-module $__DFF_N__$abc9_flop (input C, D, Q, (* init=INIT *) output n1);
-  parameter [0:0] INIT = 1'bx;
+module $__DFF_N__$abc9_flop (input C, D, Q, output n1);
   assign n1 = D;
   specify
     $setup(D, posedge C, 0);
@@ -17,8 +16,7 @@ module $__DFF_N__$abc9_flop (input C, D, Q, (* init=INIT *) output n1);
 endmodule
 
 (* abc9_flop, abc9_box, lib_whitebox *)
-module $__DFF_P__$abc9_flop (input C, D, Q, (* init=INIT *) output n1);
-  parameter [0:0] INIT = 1'bx;
+module $__DFF_P__$abc9_flop (input C, D, Q, output n1);
   assign n1 = D;
   specify
     $setup(D, posedge C, 0);