diff options
Diffstat (limited to 'passes/memory')
-rw-r--r-- | passes/memory/memory_bram.cc | 3 | ||||
-rw-r--r-- | passes/memory/memory_dff.cc | 4 | ||||
-rw-r--r-- | passes/memory/memory_share.cc | 4 |
3 files changed, 6 insertions, 5 deletions
diff --git a/passes/memory/memory_bram.cc b/passes/memory/memory_bram.cc index b1f45d5fc..1cb50b3ea 100644 --- a/passes/memory/memory_bram.cc +++ b/passes/memory/memory_bram.cc @@ -1245,7 +1245,8 @@ struct MemoryBramPass : public Pass { log("greater than 1 share the same configuration bit.\n"); log("\n"); log("Using the same bram name in different bram blocks will create different variants\n"); - log("of the bram. Verilog configuration parameters for the bram are created as needed.\n"); + log("of the bram. Verilog configuration parameters for the bram are created as\n"); + log("needed.\n"); log("\n"); log("It is also possible to create variants by repeating statements in the bram block\n"); log("and appending '@<label>' to the individual statements.\n"); diff --git a/passes/memory/memory_dff.cc b/passes/memory/memory_dff.cc index 998e86491..75c6e6a3a 100644 --- a/passes/memory/memory_dff.cc +++ b/passes/memory/memory_dff.cc @@ -631,8 +631,8 @@ struct MemoryDffPass : public Pass { log("\n"); log(" memory_dff [-no-rw-check] [selection]\n"); log("\n"); - log("This pass detects DFFs at memory read ports and merges them into the memory port.\n"); - log("I.e. it consumes an asynchronous memory port and the flip-flops at its\n"); + log("This pass detects DFFs at memory read ports and merges them into the memory\n"); + log("port. I.e. it consumes an asynchronous memory port and the flip-flops at its\n"); log("interface and yields a synchronous memory port.\n"); log("\n"); log(" -no-rw-check\n"); diff --git a/passes/memory/memory_share.cc b/passes/memory/memory_share.cc index 5cb11d62b..8b2354ef8 100644 --- a/passes/memory/memory_share.cc +++ b/passes/memory/memory_share.cc @@ -523,8 +523,8 @@ struct MemorySharePass : public Pass { log(" - When multiple write ports access the same address then this is converted\n"); log(" to a single write port with a more complex data and/or enable logic path.\n"); log("\n"); - log(" - When multiple read or write ports access adjacent aligned addresses, they are\n"); - log(" merged to a single wide read or write port. This transformation can be\n"); + log(" - When multiple read or write ports access adjacent aligned addresses, they\n"); + log(" are merged to a single wide read or write port. This transformation can be\n"); log(" disabled with the \"-nowiden\" option.\n"); log("\n"); log(" - When multiple write ports are never accessed at the same time (a SAT\n"); |