diff options
Diffstat (limited to 'passes/equiv/equiv_simple.cc')
| -rw-r--r-- | passes/equiv/equiv_simple.cc | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/passes/equiv/equiv_simple.cc b/passes/equiv/equiv_simple.cc index 408c5a793..7621341a7 100644 --- a/passes/equiv/equiv_simple.cc +++ b/passes/equiv/equiv_simple.cc @@ -1,7 +1,7 @@ /* * yosys -- Yosys Open SYnthesis Suite * - * Copyright (C) 2012 Clifford Wolf <clifford@clifford.at> + * Copyright (C) 2012 Claire Xenia Wolf <claire@yosyshq.com> * * Permission to use, copy, modify, and/or distribute this software for any * purpose with or without fee is hereby granted, provided that the above @@ -184,8 +184,12 @@ struct EquivSimpleWorker for (auto cell : problem_cells) { auto key = pair<Cell*, int>(cell, step+1); - if (!imported_cells_cache.count(key) && !satgen.importCell(cell, step+1)) - log_cmd_error("No SAT model available for cell %s (%s).\n", log_id(cell), log_id(cell->type)); + if (!imported_cells_cache.count(key) && !satgen.importCell(cell, step+1)) { + if (RTLIL::builtin_ff_cell_types().count(cell->type)) + log_cmd_error("No SAT model available for async FF cell %s (%s). Consider running `async2sync` or `clk2fflogic` first.\n", log_id(cell), log_id(cell->type)); + else + log_cmd_error("No SAT model available for cell %s (%s).\n", log_id(cell), log_id(cell->type)); + } imported_cells_cache.insert(key); } |