diff options
Diffstat (limited to 'kernel')
-rw-r--r-- | kernel/calc.cc | 60 | ||||
-rw-r--r-- | kernel/satgen.cc | 4 |
2 files changed, 22 insertions, 42 deletions
diff --git a/kernel/calc.cc b/kernel/calc.cc index ae18809d3..d54ccbc10 100644 --- a/kernel/calc.cc +++ b/kernel/calc.cc @@ -275,10 +275,15 @@ RTLIL::Const RTLIL::const_logic_or(const RTLIL::Const &arg1, const RTLIL::Const return result; } -static RTLIL::Const const_shift_worker(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool sign_ext, int direction, int result_len) +// Shift `arg1` by `arg2` bits. +// If `direction` is +1, `arg1` is shifted right by `arg2` bits; if `direction` is -1, `arg1` is shifted left by `arg2` bits. +// If `signed2` is true, `arg2` is interpreted as a signed integer; a negative `arg2` will cause a shift in the opposite direction. +// Any required bits outside the bounds of `arg1` are padded with `vacant_bits` unless `sign_ext` is true, in which case any bits outside the left +// bounds are filled with the leftmost bit of `arg1` (arithmetic shift). +static RTLIL::Const const_shift_worker(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool sign_ext, bool signed2, int direction, int result_len, RTLIL::State vacant_bits = RTLIL::State::S0) { int undef_bit_pos = -1; - BigInteger offset = const2big(arg2, false, undef_bit_pos) * direction; + BigInteger offset = const2big(arg2, signed2, undef_bit_pos) * direction; if (result_len < 0) result_len = arg1.bits.size(); @@ -290,9 +295,9 @@ static RTLIL::Const const_shift_worker(const RTLIL::Const &arg1, const RTLIL::Co for (int i = 0; i < result_len; i++) { BigInteger pos = BigInteger(i) + offset; if (pos < 0) - result.bits[i] = RTLIL::State::S0; + result.bits[i] = vacant_bits; else if (pos >= BigInteger(int(arg1.bits.size()))) - result.bits[i] = sign_ext ? arg1.bits.back() : RTLIL::State::S0; + result.bits[i] = sign_ext ? arg1.bits.back() : vacant_bits; else result.bits[i] = arg1.bits[pos.toInt()]; } @@ -304,61 +309,36 @@ RTLIL::Const RTLIL::const_shl(const RTLIL::Const &arg1, const RTLIL::Const &arg2 { RTLIL::Const arg1_ext = arg1; extend_u0(arg1_ext, result_len, signed1); - return const_shift_worker(arg1_ext, arg2, false, -1, result_len); + return const_shift_worker(arg1_ext, arg2, false, false, -1, result_len); } RTLIL::Const RTLIL::const_shr(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool, int result_len) { RTLIL::Const arg1_ext = arg1; extend_u0(arg1_ext, max(result_len, GetSize(arg1)), signed1); - return const_shift_worker(arg1_ext, arg2, false, +1, result_len); -} - -RTLIL::Const RTLIL::const_sshl(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len) -{ - if (!signed1) - return const_shl(arg1, arg2, signed1, signed2, result_len); - return const_shift_worker(arg1, arg2, true, -1, result_len); + return const_shift_worker(arg1_ext, arg2, false, false, +1, result_len); } -RTLIL::Const RTLIL::const_sshr(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len) +RTLIL::Const RTLIL::const_sshl(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool, int result_len) { - if (!signed1) - return const_shr(arg1, arg2, signed1, signed2, result_len); - return const_shift_worker(arg1, arg2, true, +1, result_len); + return const_shift_worker(arg1, arg2, signed1, false, -1, result_len); } -static RTLIL::Const const_shift_shiftx(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool, bool signed2, int result_len, RTLIL::State other_bits) +RTLIL::Const RTLIL::const_sshr(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool, int result_len) { - int undef_bit_pos = -1; - BigInteger offset = const2big(arg2, signed2, undef_bit_pos); - - if (result_len < 0) - result_len = arg1.bits.size(); - - RTLIL::Const result(RTLIL::State::Sx, result_len); - if (undef_bit_pos >= 0) - return result; - - for (int i = 0; i < result_len; i++) { - BigInteger pos = BigInteger(i) + offset; - if (pos < 0 || pos >= BigInteger(int(arg1.bits.size()))) - result.bits[i] = other_bits; - else - result.bits[i] = arg1.bits[pos.toInt()]; - } - - return result; + return const_shift_worker(arg1, arg2, signed1, false, +1, result_len); } RTLIL::Const RTLIL::const_shift(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len) { - return const_shift_shiftx(arg1, arg2, signed1, signed2, result_len, RTLIL::State::S0); + RTLIL::Const arg1_ext = arg1; + extend_u0(arg1_ext, max(result_len, GetSize(arg1)), signed1); + return const_shift_worker(arg1_ext, arg2, false, signed2, +1, result_len); } -RTLIL::Const RTLIL::const_shiftx(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len) +RTLIL::Const RTLIL::const_shiftx(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool, bool signed2, int result_len) { - return const_shift_shiftx(arg1, arg2, signed1, signed2, result_len, RTLIL::State::Sx); + return const_shift_worker(arg1, arg2, false, signed2, +1, result_len, RTLIL::State::Sx); } RTLIL::Const RTLIL::const_lt(const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len) diff --git a/kernel/satgen.cc b/kernel/satgen.cc index 73839d37a..2a54e78ec 100644 --- a/kernel/satgen.cc +++ b/kernel/satgen.cc @@ -522,7 +522,7 @@ bool SatGen::importCell(RTLIL::Cell *cell, int timestep) int extend_bit = ez->CONST_FALSE; - if (!cell->type.in(ID($shift), ID($shiftx)) && cell->parameters[ID::A_SIGNED].as_bool()) + if (cell->parameters[ID::A_SIGNED].as_bool()) extend_bit = a.back(); while (y.size() < a.size()) @@ -555,7 +555,7 @@ bool SatGen::importCell(RTLIL::Cell *cell, int timestep) std::vector<int> undef_a_shifted; extend_bit = cell->type == ID($shiftx) ? ez->CONST_TRUE : ez->CONST_FALSE; - if (!cell->type.in(ID($shift), ID($shiftx)) && cell->parameters[ID::A_SIGNED].as_bool()) + if (cell->parameters[ID::A_SIGNED].as_bool()) extend_bit = undef_a.back(); while (undef_y.size() < undef_a.size()) |