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Diffstat (limited to 'README.md')
| -rw-r--r-- | README.md | 6 |
1 files changed, 3 insertions, 3 deletions
@@ -364,16 +364,16 @@ Verilog Attributes and non-standard features it as the external-facing pin of an I/O pad, and prevents ``iopadmap`` from inserting another pad cell on it. -- The module attribute ``abc_box_id`` specifies a positive integer linking a +- The module attribute ``abc9_box_id`` specifies a positive integer linking a blackbox or whitebox definition to a corresponding entry in a `abc9` box-file. -- The port attribute ``abc_carry`` marks the carry-in (if an input port) and +- The port attribute ``abc9_carry`` marks the carry-in (if an input port) and carry-out (if output port) ports of a box. This information is necessary for `abc9` to preserve the integrity of carry-chains. Specifying this attribute onto a bus port will affect only its most significant bit. -- The port attribute ``abc_arrival`` specifies an integer (for output ports +- The port attribute ``abc9_arrival`` specifies an integer (for output ports only) to be used as the arrival time of this sequential port. It can be used, for example, to specify the clk-to-Q delay of a flip-flop for consideration during techmapping. |