/* * nextpnr -- Next Generation Place and Route * * Copyright (C) 2018 Claire Xenia Wolf * Copyright (C) 2018 gatecat * * Permission to use, copy, modify, and/or distribute this software for any * purpose with or without fee is hereby granted, provided that the above * copyright notice and this permission notice appear in all copies. * * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * */ #ifndef NO_PYTHON #include "arch_pybindings.h" #include "nextpnr.h" #include "pybindings.h" #include "pywrappers.h" using namespace pybind11::literals; NEXTPNR_NAMESPACE_BEGIN namespace PythonConversion { template <> struct string_converter { const IdString &from_str(Context *ctx, std::string name) { NPNR_ASSERT_FALSE("unsupported"); } std::string to_str(Context *ctx, const IdString &id) { return id.str(ctx); } }; } // namespace PythonConversion void arch_wrap_python(py::module &m) { using namespace PythonConversion; typedef linear_range BelRange; typedef linear_range WireRange; typedef linear_range AllPipRange; typedef const std::vector &UphillPipRange; typedef const std::vector &DownhillPipRange; typedef const std::vector &BelBucketRange; typedef const std::vector &BelRangeForBelBucket; typedef const std::vector &BelPinRange; auto arch_cls = py::class_(m, "Arch").def(py::init()); auto ctx_cls = py::class_(m, "Context") .def("checksum", &Context::checksum) .def("pack", &Context::pack) .def("place", &Context::place) .def("route", &Context::route); auto belpin_cls = py::class_(m, "BelPin").def_readwrite("bel", &BelPin::bel).def_readwrite("pin", &BelPin::pin); typedef dict> CellMap; typedef dict> NetMap; typedef dict HierarchyMap; typedef dict AliasMap; typedef dict HierarchyMap; #include "arch_pybindings_shared.h" // Generic arch construction API fn_wrapper_4a_v, conv_from_str, pass_through, pass_through>::def_wrap(ctx_cls, "addWire", "name"_a, "type"_a, "x"_a, "y"_a); fn_wrapper_6a_v, conv_from_str, conv_from_str, conv_from_str, pass_through, pass_through>::def_wrap(ctx_cls, "addPip", "name"_a, "type"_a, "srcWire"_a, "dstWire"_a, "delay"_a, "loc"_a); fn_wrapper_5a_v, conv_from_str, pass_through, pass_through, pass_through>::def_wrap(ctx_cls, "addBel", "name"_a, "type"_a, "loc"_a, "gb"_a, "hidden"_a); fn_wrapper_3a_v, conv_from_str, conv_from_str>::def_wrap(ctx_cls, "addBelInput", "bel"_a, "name"_a, "wire"_a); fn_wrapper_3a_v, conv_from_str, conv_from_str>::def_wrap(ctx_cls, "addBelOutput", "bel"_a, "name"_a, "wire"_a); fn_wrapper_3a_v, conv_from_str, conv_from_str>::def_wrap(ctx_cls, "addBelInout", "bel"_a, "name"_a, "wire"_a); fn_wrapper_4a_v, conv_from_str, conv_from_str, pass_through>::def_wrap(ctx_cls, "addBelPin", "bel"_a, "name"_a, "wire"_a, "type"_a); fn_wrapper_2a_v, conv_from_str>::def_wrap(ctx_cls, "addGroupBel", "group"_a, "bel"_a); fn_wrapper_2a_v, conv_from_str>::def_wrap(ctx_cls, "addGroupWire", "group"_a, "wire"_a); fn_wrapper_2a_v, conv_from_str>::def_wrap(ctx_cls, "addGroupPip", "group"_a, "pip"_a); fn_wrapper_2a_v, conv_from_str>::def_wrap(ctx_cls, "addGroupGroup", "group"_a, "grp"_a); fn_wrapper_2a_v, pass_through>::def_wrap(ctx_cls, "addDecalGraphic", (py::arg("decal"), "graphic")); fn_wrapper_4a_v, pass_through, pass_through, conv_from_str>::def_wrap(ctx_cls, "setWireDecal", "wire"_a, "x"_a, "y"_a, "decal"_a); fn_wrapper_4a_v, pass_through, pass_through, conv_from_str>::def_wrap(ctx_cls, "setPipDecal", "pip"_a, "x"_a, "y"_a, "decal"_a); fn_wrapper_4a_v, pass_through, pass_through, conv_from_str>::def_wrap(ctx_cls, "setBelDecal", "bel"_a, "x"_a, "y"_a, "decal"_a); fn_wrapper_4a_v, pass_through, pass_through, conv_from_str>::def_wrap(ctx_cls, "setGroupDecal", "group"_a, "x"_a, "y"_a, "decal"_a); fn_wrapper_3a_v, conv_from_str, pass_through>::def_wrap(ctx_cls, "setWireAttr", "wire"_a, "key"_a, "value"_a); fn_wrapper_3a_v, conv_from_str, pass_through>::def_wrap(ctx_cls, "setBelAttr", "bel"_a, "key"_a, "value"_a); fn_wrapper_3a_v, conv_from_str, pass_through>::def_wrap(ctx_cls, "setPipAttr", "pip"_a, "key"_a, "value"_a); fn_wrapper_1a_v>::def_wrap( ctx_cls, "setLutK", "K"_a); fn_wrapper_2a_v, pass_through>::def_wrap(ctx_cls, "setDelayScaling", "scale"_a, "offset"_a); fn_wrapper_2a_v, conv_from_str>::def_wrap(ctx_cls, "addCellTimingClock", "cell"_a, "port"_a); fn_wrapper_4a_v, conv_from_str, conv_from_str, pass_through>::def_wrap(ctx_cls, "addCellTimingDelay", "cell"_a, "fromPort"_a, "toPort"_a, "delay"_a); fn_wrapper_5a_v, conv_from_str, conv_from_str, pass_through, pass_through>::def_wrap(ctx_cls, "addCellTimingSetupHold", "cell"_a, "port"_a, "clock"_a, "setup"_a, "hold"_a); fn_wrapper_4a_v, conv_from_str, conv_from_str, pass_through>::def_wrap(ctx_cls, "addCellTimingClockToOut", "cell"_a, "port"_a, "clock"_a, "clktoq"_a); fn_wrapper_2a_v, conv_from_str>::def_wrap(ctx_cls, "clearCellBelPinMap", "cell"_a, "cell_pin"_a); fn_wrapper_3a_v, conv_from_str, conv_from_str>::def_wrap(ctx_cls, "addCellBelPinMapping", "cell"_a, "cell_pin"_a, "bel_pin"_a); WRAP_RANGE(m, Bel, conv_to_str); WRAP_RANGE(m, Wire, conv_to_str); WRAP_RANGE(m, AllPip, conv_to_str); WRAP_MAP_UPTR(m, CellMap, "IdCellMap"); WRAP_MAP_UPTR(m, NetMap, "IdNetMap"); WRAP_MAP(m, HierarchyMap, wrap_context, "HierarchyMap"); WRAP_VECTOR(m, const std::vector, conv_to_str); WRAP_VECTOR(m, const std::vector, conv_to_str); } NEXTPNR_NAMESPACE_END #endif