From 12818fb69479cd6a1908bcae37de2b817632d33c Mon Sep 17 00:00:00 2001 From: David Shah Date: Sun, 17 Jun 2018 12:38:21 +0200 Subject: ice40: Add symbol output to bitstream generation Signed-off-by: David Shah --- ice40/bitstream.cc | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) (limited to 'ice40') diff --git a/ice40/bitstream.cc b/ice40/bitstream.cc index a0a32171..918eb01b 100644 --- a/ice40/bitstream.cc +++ b/ice40/bitstream.cc @@ -287,12 +287,6 @@ void write_asc(const Design &design, std::ostream &out) TileType tile = tile_at(chip, x, y); TileInfoPOD &ti = bi.tiles_nonrouting[tile]; - // disable RAM to stop icebox_vlog crashing (FIXME) - if ((tile == TILE_RAMB) && (chip.args.type == ChipArgs::LP1K || - chip.args.type == ChipArgs::HX1K)) { - set_config(ti, config.at(y).at(x), "RamConfig.PowerUp", true); - } - // set all ColBufCtrl bits (FIXME) bool setColBufCtrl = true; if (chip.args.type == ChipArgs::LP1K || @@ -398,6 +392,14 @@ void write_asc(const Design &design, std::ostream &out) } } } + + // Write symbols + const bool write_symbols = 1; + for (auto wire : chip.getWires()) { + IdString net = chip.getWireNet(wire, false); + if (net != IdString()) + out << ".sym " << wire.index << " net_" << net << std::endl; + } } NEXTPNR_NAMESPACE_END -- cgit v1.2.3