From bd2da27e4e35e92ad91145921cf9c7d2c490a9df Mon Sep 17 00:00:00 2001 From: Alessandro Comodi Date: Fri, 12 Mar 2021 19:03:02 +0100 Subject: fpga_interchange: tests: added comment and fixed XDC Signed-off-by: Alessandro Comodi --- fpga_interchange/examples/tests.cmake | 11 ++++++++++- .../examples/tests/const_wire/CMakeLists.txt | 8 ++++---- .../examples/tests/const_wire/wire.xdc | 9 --------- .../examples/tests/const_wire/wire_arty.xdc | 9 +++++++++ .../examples/tests/const_wire/wire_basys3.xdc | 9 +++++++++ .../examples/tests/counter/CMakeLists.txt | 8 ++++---- .../examples/tests/counter/counter.xdc | 22 ---------------------- .../examples/tests/counter/counter_arty.xdc | 14 ++++++++++++++ .../examples/tests/counter/counter_basys3.xdc | 14 ++++++++++++++ fpga_interchange/examples/tests/ff/CMakeLists.txt | 8 ++++---- fpga_interchange/examples/tests/ff/ff.xdc | 9 --------- fpga_interchange/examples/tests/ff/ff_arty.xdc | 9 +++++++++ fpga_interchange/examples/tests/ff/ff_basys3.xdc | 9 +++++++++ fpga_interchange/examples/tests/lut/CMakeLists.txt | 8 ++++---- fpga_interchange/examples/tests/lut/lut.xdc | 7 ------- fpga_interchange/examples/tests/lut/lut_arty.xdc | 7 +++++++ fpga_interchange/examples/tests/lut/lut_basys3.xdc | 7 +++++++ .../examples/tests/wire/CMakeLists.txt | 8 ++++---- fpga_interchange/examples/tests/wire/wire.xdc | 5 ----- fpga_interchange/examples/tests/wire/wire_arty.xdc | 5 +++++ .../examples/tests/wire/wire_basys3.xdc | 5 +++++ 21 files changed, 118 insertions(+), 73 deletions(-) delete mode 100644 fpga_interchange/examples/tests/const_wire/wire.xdc create mode 100644 fpga_interchange/examples/tests/const_wire/wire_arty.xdc create mode 100644 fpga_interchange/examples/tests/const_wire/wire_basys3.xdc delete mode 100644 fpga_interchange/examples/tests/counter/counter.xdc create mode 100644 fpga_interchange/examples/tests/counter/counter_arty.xdc create mode 100644 fpga_interchange/examples/tests/counter/counter_basys3.xdc delete mode 100644 fpga_interchange/examples/tests/ff/ff.xdc create mode 100644 fpga_interchange/examples/tests/ff/ff_arty.xdc create mode 100644 fpga_interchange/examples/tests/ff/ff_basys3.xdc delete mode 100644 fpga_interchange/examples/tests/lut/lut.xdc create mode 100644 fpga_interchange/examples/tests/lut/lut_arty.xdc create mode 100644 fpga_interchange/examples/tests/lut/lut_basys3.xdc delete mode 100644 fpga_interchange/examples/tests/wire/wire.xdc create mode 100644 fpga_interchange/examples/tests/wire/wire_arty.xdc create mode 100644 fpga_interchange/examples/tests/wire/wire_basys3.xdc (limited to 'fpga_interchange') diff --git a/fpga_interchange/examples/tests.cmake b/fpga_interchange/examples/tests.cmake index cb2ec483..4dc5ba48 100644 --- a/fpga_interchange/examples/tests.cmake +++ b/fpga_interchange/examples/tests.cmake @@ -9,7 +9,14 @@ function(add_interchange_test) # top # sources # ) - # ~~~ + # + # Generates targets to run desired tests + # + # Targets generated: + # - test-fpga_interchange--json : synthesis output + # - test-fpga_interchange--netlist : interchange logical netlist + # - test-fpga_interchange--phys : interchange physical netlist + # - test-fpga_interchange--phys : design checkpoint with RapidWright set(options) set(oneValueArgs name device package tcl xdc top) @@ -70,6 +77,7 @@ function(add_interchange_test) DEPENDS ${synth_json} ${device_target} + ${device_loc} ) add_custom_target(test-${family}-${name}-netlist DEPENDS ${netlist}) @@ -90,6 +98,7 @@ function(add_interchange_test) DEPENDS ${netlist} ${chipdb_target} + ${chipdb_dir}/chipdb-${device}.bba ) add_custom_target(test-${family}-${name}-phys DEPENDS ${phys}) diff --git a/fpga_interchange/examples/tests/const_wire/CMakeLists.txt b/fpga_interchange/examples/tests/const_wire/CMakeLists.txt index 6dbeaae5..8a3c4375 100644 --- a/fpga_interchange/examples/tests/const_wire/CMakeLists.txt +++ b/fpga_interchange/examples/tests/const_wire/CMakeLists.txt @@ -1,17 +1,17 @@ add_interchange_test( name const_wire_basys3 - device xc7a50t + device xc7a35t package cpg236 tcl run.tcl - xdc wire.xdc + xdc wire_basys3.xdc sources wire.v ) add_interchange_test( name const_wire_arty - device xc7a50t + device xc7a35t package csg324 tcl run.tcl - xdc wire.xdc + xdc wire_arty.xdc sources wire.v ) diff --git a/fpga_interchange/examples/tests/const_wire/wire.xdc b/fpga_interchange/examples/tests/const_wire/wire.xdc deleted file mode 100644 index 0d96fc45..00000000 --- a/fpga_interchange/examples/tests/const_wire/wire.xdc +++ /dev/null @@ -1,9 +0,0 @@ -set_property PACKAGE_PIN N15 [get_ports o] -set_property PACKAGE_PIN N16 [get_ports o2] -set_property PACKAGE_PIN P17 [get_ports o3] -set_property PACKAGE_PIN R17 [get_ports o4] - -set_property IOSTANDARD LVCMOS33 [get_ports o] -set_property IOSTANDARD LVCMOS33 [get_ports o2] -set_property IOSTANDARD LVCMOS33 [get_ports o3] -set_property IOSTANDARD LVCMOS33 [get_ports o4] diff --git a/fpga_interchange/examples/tests/const_wire/wire_arty.xdc b/fpga_interchange/examples/tests/const_wire/wire_arty.xdc new file mode 100644 index 00000000..0d96fc45 --- /dev/null +++ b/fpga_interchange/examples/tests/const_wire/wire_arty.xdc @@ -0,0 +1,9 @@ +set_property PACKAGE_PIN N15 [get_ports o] +set_property PACKAGE_PIN N16 [get_ports o2] +set_property PACKAGE_PIN P17 [get_ports o3] +set_property PACKAGE_PIN R17 [get_ports o4] + +set_property IOSTANDARD LVCMOS33 [get_ports o] +set_property IOSTANDARD LVCMOS33 [get_ports o2] +set_property IOSTANDARD LVCMOS33 [get_ports o3] +set_property IOSTANDARD LVCMOS33 [get_ports o4] diff --git a/fpga_interchange/examples/tests/const_wire/wire_basys3.xdc b/fpga_interchange/examples/tests/const_wire/wire_basys3.xdc new file mode 100644 index 00000000..f8435580 --- /dev/null +++ b/fpga_interchange/examples/tests/const_wire/wire_basys3.xdc @@ -0,0 +1,9 @@ +set_property PACKAGE_PIN U16 [get_ports o] +set_property PACKAGE_PIN E19 [get_ports o2] +set_property PACKAGE_PIN U19 [get_ports o3] +set_property PACKAGE_PIN V19 [get_ports o4] + +set_property IOSTANDARD LVCMOS33 [get_ports o] +set_property IOSTANDARD LVCMOS33 [get_ports o2] +set_property IOSTANDARD LVCMOS33 [get_ports o3] +set_property IOSTANDARD LVCMOS33 [get_ports o4] diff --git a/fpga_interchange/examples/tests/counter/CMakeLists.txt b/fpga_interchange/examples/tests/counter/CMakeLists.txt index ac180070..60375770 100644 --- a/fpga_interchange/examples/tests/counter/CMakeLists.txt +++ b/fpga_interchange/examples/tests/counter/CMakeLists.txt @@ -1,17 +1,17 @@ add_interchange_test( name counter_basys3 - device xc7a50t + device xc7a35t package cpg236 tcl run.tcl - xdc counter.xdc + xdc counter_basys3.xdc sources counter.v ) add_interchange_test( name counter_arty - device xc7a50t + device xc7a35t package csg324 tcl run.tcl - xdc counter.xdc + xdc counter_arty.xdc sources counter.v ) diff --git a/fpga_interchange/examples/tests/counter/counter.xdc b/fpga_interchange/examples/tests/counter/counter.xdc deleted file mode 100644 index 7cbe67f6..00000000 --- a/fpga_interchange/examples/tests/counter/counter.xdc +++ /dev/null @@ -1,22 +0,0 @@ -## basys3 breakout board -set_property PACKAGE_PIN W5 [get_ports clk] -set_property PACKAGE_PIN V17 [get_ports rst] -#set_property PACKAGE_PIN U16 [get_ports io_led[0]] -#set_property PACKAGE_PIN E19 [get_ports io_led[1]] -#set_property PACKAGE_PIN U19 [get_ports io_led[2]] -#set_property PACKAGE_PIN V19 [get_ports io_led[3]] -set_property PACKAGE_PIN U16 [get_ports io_led[4]] -set_property PACKAGE_PIN E19 [get_ports io_led[5]] -set_property PACKAGE_PIN U19 [get_ports io_led[6]] -set_property PACKAGE_PIN V19 [get_ports io_led[7]] - -set_property IOSTANDARD LVCMOS33 [get_ports clk] -set_property IOSTANDARD LVCMOS33 [get_ports rst] -set_property IOSTANDARD LVCMOS33 [get_ports io_led[4]] -set_property IOSTANDARD LVCMOS33 [get_ports io_led[5]] -set_property IOSTANDARD LVCMOS33 [get_ports io_led[6]] -set_property IOSTANDARD LVCMOS33 [get_ports io_led[7]] -#set_property IOSTANDARD LVCMOS33 [get_ports io_led[0]] -#set_property IOSTANDARD LVCMOS33 [get_ports io_led[1]] -#set_property IOSTANDARD LVCMOS33 [get_ports io_led[2]] -#set_property IOSTANDARD LVCMOS33 [get_ports io_led[3]] diff --git a/fpga_interchange/examples/tests/counter/counter_arty.xdc b/fpga_interchange/examples/tests/counter/counter_arty.xdc new file mode 100644 index 00000000..c6873df5 --- /dev/null +++ b/fpga_interchange/examples/tests/counter/counter_arty.xdc @@ -0,0 +1,14 @@ +## basys3 breakout board +set_property PACKAGE_PIN E3 [get_ports clk] +set_property PACKAGE_PIN C2 [get_ports rst] +set_property PACKAGE_PIN N15 [get_ports io_led[4]] +set_property PACKAGE_PIN N16 [get_ports io_led[5]] +set_property PACKAGE_PIN P17 [get_ports io_led[6]] +set_property PACKAGE_PIN R17 [get_ports io_led[7]] + +set_property IOSTANDARD LVCMOS33 [get_ports clk] +set_property IOSTANDARD LVCMOS33 [get_ports rst] +set_property IOSTANDARD LVCMOS33 [get_ports io_led[4]] +set_property IOSTANDARD LVCMOS33 [get_ports io_led[5]] +set_property IOSTANDARD LVCMOS33 [get_ports io_led[6]] +set_property IOSTANDARD LVCMOS33 [get_ports io_led[7]] diff --git a/fpga_interchange/examples/tests/counter/counter_basys3.xdc b/fpga_interchange/examples/tests/counter/counter_basys3.xdc new file mode 100644 index 00000000..09446b5f --- /dev/null +++ b/fpga_interchange/examples/tests/counter/counter_basys3.xdc @@ -0,0 +1,14 @@ +## basys3 breakout board +set_property PACKAGE_PIN W5 [get_ports clk] +set_property PACKAGE_PIN V17 [get_ports rst] +set_property PACKAGE_PIN U16 [get_ports io_led[4]] +set_property PACKAGE_PIN E19 [get_ports io_led[5]] +set_property PACKAGE_PIN U19 [get_ports io_led[6]] +set_property PACKAGE_PIN V19 [get_ports io_led[7]] + +set_property IOSTANDARD LVCMOS33 [get_ports clk] +set_property IOSTANDARD LVCMOS33 [get_ports rst] +set_property IOSTANDARD LVCMOS33 [get_ports io_led[4]] +set_property IOSTANDARD LVCMOS33 [get_ports io_led[5]] +set_property IOSTANDARD LVCMOS33 [get_ports io_led[6]] +set_property IOSTANDARD LVCMOS33 [get_ports io_led[7]] diff --git a/fpga_interchange/examples/tests/ff/CMakeLists.txt b/fpga_interchange/examples/tests/ff/CMakeLists.txt index 30ae0417..953e6038 100644 --- a/fpga_interchange/examples/tests/ff/CMakeLists.txt +++ b/fpga_interchange/examples/tests/ff/CMakeLists.txt @@ -1,17 +1,17 @@ add_interchange_test( name ff_basys3 - device xc7a50t + device xc7a35t package cpg236 tcl run.tcl - xdc ff.xdc + xdc ff_basys3.xdc sources ff.v ) add_interchange_test( name ff_arty - device xc7a50t + device xc7a35t package csg324 tcl run.tcl - xdc ff.xdc + xdc ff_arty.xdc sources ff.v ) diff --git a/fpga_interchange/examples/tests/ff/ff.xdc b/fpga_interchange/examples/tests/ff/ff.xdc deleted file mode 100644 index 3c132f1d..00000000 --- a/fpga_interchange/examples/tests/ff/ff.xdc +++ /dev/null @@ -1,9 +0,0 @@ -set_property PACKAGE_PIN P17 [get_ports clk] -set_property PACKAGE_PIN N15 [get_ports d] -set_property PACKAGE_PIN N16 [get_ports r] -set_property PACKAGE_PIN M17 [get_ports q] - -set_property IOSTANDARD LVCMOS33 [get_ports clk] -set_property IOSTANDARD LVCMOS33 [get_ports d] -set_property IOSTANDARD LVCMOS33 [get_ports r] -set_property IOSTANDARD LVCMOS33 [get_ports q] diff --git a/fpga_interchange/examples/tests/ff/ff_arty.xdc b/fpga_interchange/examples/tests/ff/ff_arty.xdc new file mode 100644 index 00000000..3c132f1d --- /dev/null +++ b/fpga_interchange/examples/tests/ff/ff_arty.xdc @@ -0,0 +1,9 @@ +set_property PACKAGE_PIN P17 [get_ports clk] +set_property PACKAGE_PIN N15 [get_ports d] +set_property PACKAGE_PIN N16 [get_ports r] +set_property PACKAGE_PIN M17 [get_ports q] + +set_property IOSTANDARD LVCMOS33 [get_ports clk] +set_property IOSTANDARD LVCMOS33 [get_ports d] +set_property IOSTANDARD LVCMOS33 [get_ports r] +set_property IOSTANDARD LVCMOS33 [get_ports q] diff --git a/fpga_interchange/examples/tests/ff/ff_basys3.xdc b/fpga_interchange/examples/tests/ff/ff_basys3.xdc new file mode 100644 index 00000000..ef65112a --- /dev/null +++ b/fpga_interchange/examples/tests/ff/ff_basys3.xdc @@ -0,0 +1,9 @@ +set_property PACKAGE_PIN W5 [get_ports clk] +set_property PACKAGE_PIN U16 [get_ports d] +set_property PACKAGE_PIN E19 [get_ports r] +set_property PACKAGE_PIN U19 [get_ports q] + +set_property IOSTANDARD LVCMOS33 [get_ports clk] +set_property IOSTANDARD LVCMOS33 [get_ports d] +set_property IOSTANDARD LVCMOS33 [get_ports r] +set_property IOSTANDARD LVCMOS33 [get_ports q] diff --git a/fpga_interchange/examples/tests/lut/CMakeLists.txt b/fpga_interchange/examples/tests/lut/CMakeLists.txt index ac504351..47b6f389 100644 --- a/fpga_interchange/examples/tests/lut/CMakeLists.txt +++ b/fpga_interchange/examples/tests/lut/CMakeLists.txt @@ -1,17 +1,17 @@ add_interchange_test( name lut_basys3 - device xc7a50t + device xc7a35t package cpg236 tcl run.tcl - xdc lut.xdc + xdc lut_basys3.xdc sources lut.v ) add_interchange_test( name lut_arty - device xc7a50t + device xc7a35t package csg324 tcl run.tcl - xdc lut.xdc + xdc lut_arty.xdc sources lut.v ) diff --git a/fpga_interchange/examples/tests/lut/lut.xdc b/fpga_interchange/examples/tests/lut/lut.xdc deleted file mode 100644 index 4f390f25..00000000 --- a/fpga_interchange/examples/tests/lut/lut.xdc +++ /dev/null @@ -1,7 +0,0 @@ -set_property PACKAGE_PIN N16 [get_ports i0] -set_property PACKAGE_PIN N15 [get_ports i1] -set_property PACKAGE_PIN M17 [get_ports o] - -set_property IOSTANDARD LVCMOS33 [get_ports i0] -set_property IOSTANDARD LVCMOS33 [get_ports i1] -set_property IOSTANDARD LVCMOS33 [get_ports o] diff --git a/fpga_interchange/examples/tests/lut/lut_arty.xdc b/fpga_interchange/examples/tests/lut/lut_arty.xdc new file mode 100644 index 00000000..4f390f25 --- /dev/null +++ b/fpga_interchange/examples/tests/lut/lut_arty.xdc @@ -0,0 +1,7 @@ +set_property PACKAGE_PIN N16 [get_ports i0] +set_property PACKAGE_PIN N15 [get_ports i1] +set_property PACKAGE_PIN M17 [get_ports o] + +set_property IOSTANDARD LVCMOS33 [get_ports i0] +set_property IOSTANDARD LVCMOS33 [get_ports i1] +set_property IOSTANDARD LVCMOS33 [get_ports o] diff --git a/fpga_interchange/examples/tests/lut/lut_basys3.xdc b/fpga_interchange/examples/tests/lut/lut_basys3.xdc new file mode 100644 index 00000000..aef287ee --- /dev/null +++ b/fpga_interchange/examples/tests/lut/lut_basys3.xdc @@ -0,0 +1,7 @@ +set_property PACKAGE_PIN V17 [get_ports i0] +set_property PACKAGE_PIN V16 [get_ports i1] +set_property PACKAGE_PIN U16 [get_ports o] + +set_property IOSTANDARD LVCMOS33 [get_ports i0] +set_property IOSTANDARD LVCMOS33 [get_ports i1] +set_property IOSTANDARD LVCMOS33 [get_ports o] diff --git a/fpga_interchange/examples/tests/wire/CMakeLists.txt b/fpga_interchange/examples/tests/wire/CMakeLists.txt index 1d3b36ac..9af3f0db 100644 --- a/fpga_interchange/examples/tests/wire/CMakeLists.txt +++ b/fpga_interchange/examples/tests/wire/CMakeLists.txt @@ -1,17 +1,17 @@ add_interchange_test( name wire_basys3 - device xc7a50t + device xc7a35t package cpg236 tcl run.tcl - xdc wire.xdc + xdc wire_basys3.xdc sources wire.v ) add_interchange_test( name wire_arty - device xc7a50t + device xc7a35t package csg324 tcl run.tcl - xdc wire.xdc + xdc wire_arty.xdc sources wire.v ) diff --git a/fpga_interchange/examples/tests/wire/wire.xdc b/fpga_interchange/examples/tests/wire/wire.xdc deleted file mode 100644 index c923f0fc..00000000 --- a/fpga_interchange/examples/tests/wire/wire.xdc +++ /dev/null @@ -1,5 +0,0 @@ -set_property PACKAGE_PIN N16 [get_ports i] -set_property PACKAGE_PIN N15 [get_ports o] - -set_property IOSTANDARD LVCMOS33 [get_ports i] -set_property IOSTANDARD LVCMOS33 [get_ports o] diff --git a/fpga_interchange/examples/tests/wire/wire_arty.xdc b/fpga_interchange/examples/tests/wire/wire_arty.xdc new file mode 100644 index 00000000..c923f0fc --- /dev/null +++ b/fpga_interchange/examples/tests/wire/wire_arty.xdc @@ -0,0 +1,5 @@ +set_property PACKAGE_PIN N16 [get_ports i] +set_property PACKAGE_PIN N15 [get_ports o] + +set_property IOSTANDARD LVCMOS33 [get_ports i] +set_property IOSTANDARD LVCMOS33 [get_ports o] diff --git a/fpga_interchange/examples/tests/wire/wire_basys3.xdc b/fpga_interchange/examples/tests/wire/wire_basys3.xdc new file mode 100644 index 00000000..317d5acc --- /dev/null +++ b/fpga_interchange/examples/tests/wire/wire_basys3.xdc @@ -0,0 +1,5 @@ +set_property PACKAGE_PIN V17 [get_ports i] +set_property PACKAGE_PIN U16 [get_ports o] + +set_property IOSTANDARD LVCMOS33 [get_ports i] +set_property IOSTANDARD LVCMOS33 [get_ports o] -- cgit v1.2.3