From 009d3b64b67cf8a1ac2929eea906ae4fc4c23ef6 Mon Sep 17 00:00:00 2001 From: Keith Rothman <537074+litghost@users.noreply.github.com> Date: Thu, 1 Apr 2021 15:16:23 -0700 Subject: [interchange] Update to v6 of FPGA interchange chipdb. Changes: - Adds LUT output pin to LutBelPOD. Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com> --- fpga_interchange/luts.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'fpga_interchange/luts.h') diff --git a/fpga_interchange/luts.h b/fpga_interchange/luts.h index dec5a9d6..5a46b3ed 100644 --- a/fpga_interchange/luts.h +++ b/fpga_interchange/luts.h @@ -51,10 +51,14 @@ struct LutCell struct LutBel { + IdString name; + // LUT BEL pins to LUT array index. std::vector pins; std::unordered_map pin_to_index; + IdString output_pin; + // What part of the LUT equation does this LUT output use? // This assumes contiguous LUT bits. uint32_t low_bit; -- cgit v1.2.3