From fc5e6bec9ab8bf2c25b2b943de4013daf727dfb8 Mon Sep 17 00:00:00 2001
From: David Shah <dave@ds0.me>
Date: Mon, 12 Nov 2018 13:42:25 +0000
Subject: timing: Add support for clock constraints

Signed-off-by: David Shah <dave@ds0.me>
---
 ecp5/arch_pybindings.cc | 4 ++++
 1 file changed, 4 insertions(+)

(limited to 'ecp5/arch_pybindings.cc')

diff --git a/ecp5/arch_pybindings.cc b/ecp5/arch_pybindings.cc
index 9312b4ad..5e73a673 100644
--- a/ecp5/arch_pybindings.cc
+++ b/ecp5/arch_pybindings.cc
@@ -130,6 +130,10 @@ void arch_wrap_python()
                                                                                                              "cells");
     readonly_wrapper<Context, decltype(&Context::nets), &Context::nets, wrap_context<NetMap &>>::def_wrap(ctx_cls,
                                                                                                           "nets");
+
+    fn_wrapper_2a_v<Context, decltype(&Context::addClock), &Context::addClock, conv_from_str<IdString>,
+                    pass_through<float>>::def_wrap(ctx_cls, "addClock");
+
     WRAP_RANGE(Bel, conv_to_str<BelId>);
     WRAP_RANGE(Wire, conv_to_str<WireId>);
     WRAP_RANGE(AllPip, conv_to_str<PipId>);
-- 
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