From a4fa95374057d700a873be7687ed26a3dceae9ef Mon Sep 17 00:00:00 2001 From: Ross Schlaikjer Date: Wed, 29 Apr 2020 11:08:53 -0400 Subject: Use registered port class on mult18x18 --- ecp5/arch.cc | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) (limited to 'ecp5/arch.cc') diff --git a/ecp5/arch.cc b/ecp5/arch.cc index fa8dc242..a6ac9f84 100644 --- a/ecp5/arch.cc +++ b/ecp5/arch.cc @@ -940,10 +940,12 @@ TimingPortClass Arch::getPortTimingClass(const CellInfo *cell, IdString port, in return TMG_CLOCK_INPUT; std::string pname = port.str(this); if (pname.size() > 1) { - if ((pname.front() == 'A' || pname.front() == 'B') && std::isdigit(pname.at(1))) - return TMG_COMB_INPUT; + if (pname.front() == 'A' && std::isdigit(pname.at(1))) + return cell->multInfo.is_in_a_registered ? TMG_REGISTER_INPUT : TMG_COMB_INPUT; + if (pname.front() == 'B' && std::isdigit(pname.at(1))) + return cell->multInfo.is_in_b_registered ? TMG_REGISTER_INPUT : TMG_COMB_INPUT; if (pname.front() == 'P' && std::isdigit(pname.at(1))) - return TMG_COMB_OUTPUT; + return cell->multInfo.is_output_registered ? TMG_REGISTER_OUTPUT : TMG_COMB_OUTPUT; } return TMG_IGNORE; } else if (cell->type == id_ALU54B) { -- cgit v1.2.3