From ad18cdb08787c4ecc88edaec353a96f59135c62d Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Mon, 18 Jun 2018 13:35:25 +0200 Subject: Rename Chip to Arch and ChipArgs to ArchArgs Signed-off-by: Clifford Wolf --- dummy/chip.cc | 80 ++++++++++++++++++++++++++--------------------------- dummy/chip.h | 8 ++---- dummy/main.cc | 2 +- dummy/pybindings.cc | 2 +- 4 files changed, 45 insertions(+), 47 deletions(-) (limited to 'dummy') diff --git a/dummy/chip.cc b/dummy/chip.cc index 965517fe..5bbf36e3 100644 --- a/dummy/chip.cc +++ b/dummy/chip.cc @@ -22,48 +22,48 @@ NEXTPNR_NAMESPACE_BEGIN -Chip::Chip(ChipArgs) {} +Arch::Arch(ArchArgs) {} -std::string Chip::getChipName() { return "Dummy"; } +std::string Arch::getChipName() { return "Dummy"; } void IdString::initialize_chip() {} // --------------------------------------------------------------- -BelId Chip::getBelByName(IdString name) const { return BelId(); } +BelId Arch::getBelByName(IdString name) const { return BelId(); } -IdString Chip::getBelName(BelId bel) const { return IdString(); } +IdString Arch::getBelName(BelId bel) const { return IdString(); } -void Chip::bindBel(BelId bel, IdString cell) {} +void Arch::bindBel(BelId bel, IdString cell) {} -void Chip::unbindBel(BelId bel) {} +void Arch::unbindBel(BelId bel) {} -bool Chip::checkBelAvail(BelId bel) const { return false; } +bool Arch::checkBelAvail(BelId bel) const { return false; } -IdString Chip::getBelCell(BelId bel, bool conflicting) const +IdString Arch::getBelCell(BelId bel, bool conflicting) const { return IdString(); } -const std::vector &Chip::getBels() const +const std::vector &Arch::getBels() const { static std::vector ret; return ret; } -const std::vector &Chip::getBelsByType(BelType type) const +const std::vector &Arch::getBelsByType(BelType type) const { static std::vector ret; return ret; } -BelType Chip::getBelType(BelId bel) const { return BelType(); } +BelType Arch::getBelType(BelId bel) const { return BelType(); } -WireId Chip::getWireBelPin(BelId bel, PortPin pin) const { return WireId(); } +WireId Arch::getWireBelPin(BelId bel, PortPin pin) const { return WireId(); } -BelPin Chip::getBelPinUphill(WireId wire) const { return BelPin(); } +BelPin Arch::getBelPinUphill(WireId wire) const { return BelPin(); } -const std::vector &Chip::getBelPinsDownhill(WireId wire) const +const std::vector &Arch::getBelPinsDownhill(WireId wire) const { static std::vector ret; return ret; @@ -71,22 +71,22 @@ const std::vector &Chip::getBelPinsDownhill(WireId wire) const // --------------------------------------------------------------- -WireId Chip::getWireByName(IdString name) const { return WireId(); } +WireId Arch::getWireByName(IdString name) const { return WireId(); } -IdString Chip::getWireName(WireId wire) const { return IdString(); } +IdString Arch::getWireName(WireId wire) const { return IdString(); } -void Chip::bindWire(WireId wire, IdString net) {} +void Arch::bindWire(WireId wire, IdString net) {} -void Chip::unbindWire(WireId wire) {} +void Arch::unbindWire(WireId wire) {} -bool Chip::checkWireAvail(WireId wire) const { return false; } +bool Arch::checkWireAvail(WireId wire) const { return false; } -IdString Chip::getWireNet(WireId wire, bool conflicting) const +IdString Arch::getWireNet(WireId wire, bool conflicting) const { return IdString(); } -const std::vector &Chip::getWires() const +const std::vector &Arch::getWires() const { static std::vector ret; return ret; @@ -94,46 +94,46 @@ const std::vector &Chip::getWires() const // --------------------------------------------------------------- -PipId Chip::getPipByName(IdString name) const { return PipId(); } +PipId Arch::getPipByName(IdString name) const { return PipId(); } -IdString Chip::getPipName(PipId pip) const { return IdString(); } +IdString Arch::getPipName(PipId pip) const { return IdString(); } -void Chip::bindPip(PipId pip, IdString net) {} +void Arch::bindPip(PipId pip, IdString net) {} -void Chip::unbindPip(PipId pip) {} +void Arch::unbindPip(PipId pip) {} -bool Chip::checkPipAvail(PipId pip) const { return false; } +bool Arch::checkPipAvail(PipId pip) const { return false; } -IdString Chip::getPipNet(PipId pip, bool conflicting) const +IdString Arch::getPipNet(PipId pip, bool conflicting) const { return IdString(); } -const std::vector &Chip::getPips() const +const std::vector &Arch::getPips() const { static std::vector ret; return ret; } -WireId Chip::getPipSrcWire(PipId pip) const { return WireId(); } +WireId Arch::getPipSrcWire(PipId pip) const { return WireId(); } -WireId Chip::getPipDstWire(PipId pip) const { return WireId(); } +WireId Arch::getPipDstWire(PipId pip) const { return WireId(); } -DelayInfo Chip::getPipDelay(PipId pip) const { return DelayInfo(); } +DelayInfo Arch::getPipDelay(PipId pip) const { return DelayInfo(); } -const std::vector &Chip::getPipsDownhill(WireId wire) const +const std::vector &Arch::getPipsDownhill(WireId wire) const { static std::vector ret; return ret; } -const std::vector &Chip::getPipsUphill(WireId wire) const +const std::vector &Arch::getPipsUphill(WireId wire) const { static std::vector ret; return ret; } -const std::vector &Chip::getWireAliases(WireId wire) const +const std::vector &Arch::getWireAliases(WireId wire) const { static std::vector ret; return ret; @@ -141,36 +141,36 @@ const std::vector &Chip::getWireAliases(WireId wire) const // --------------------------------------------------------------- -bool Chip::estimatePosition(BelId bel, int &x, int &y) const +bool Arch::estimatePosition(BelId bel, int &x, int &y) const { x = 0.0; y = 0.0; return false; } -delay_t Chip::estimateDelay(WireId src, WireId dst) const { return 0.0; } +delay_t Arch::estimateDelay(WireId src, WireId dst) const { return 0.0; } // --------------------------------------------------------------- -std::vector Chip::getFrameGraphics() const +std::vector Arch::getFrameGraphics() const { static std::vector ret; return ret; } -std::vector Chip::getBelGraphics(BelId bel) const +std::vector Arch::getBelGraphics(BelId bel) const { static std::vector ret; return ret; } -std::vector Chip::getWireGraphics(WireId wire) const +std::vector Arch::getWireGraphics(WireId wire) const { static std::vector ret; return ret; } -std::vector Chip::getPipGraphics(PipId pip) const +std::vector Arch::getPipGraphics(PipId pip) const { static std::vector ret; return ret; diff --git a/dummy/chip.h b/dummy/chip.h index 03e16e64..c0803510 100644 --- a/dummy/chip.h +++ b/dummy/chip.h @@ -63,15 +63,13 @@ struct BelPin PortPin pin; }; -struct ChipArgs +struct ArchArgs { }; -std::string getChipName(ChipArgs id); - -struct Chip +struct Arch { - Chip(ChipArgs args); + Arch(ArchArgs args); std::string getChipName(); diff --git a/dummy/main.cc b/dummy/main.cc index 7aa2f08f..9ac4db26 100644 --- a/dummy/main.cc +++ b/dummy/main.cc @@ -27,7 +27,7 @@ USING_NEXTPNR_NAMESPACE int main(int argc, char *argv[]) { - Design design(ChipArgs{}); + Design design(ArchArgs{}); QApplication a(argc, argv); MainWindow w(&design); diff --git a/dummy/pybindings.cc b/dummy/pybindings.cc index ec0e20b2..87716267 100644 --- a/dummy/pybindings.cc +++ b/dummy/pybindings.cc @@ -23,6 +23,6 @@ NEXTPNR_NAMESPACE_BEGIN -void arch_wrap_python() { class_("ChipArgs"); } +void arch_wrap_python() { class_("ArchArgs"); } NEXTPNR_NAMESPACE_END -- cgit v1.2.3