From d5e4986e1bf6e79b81beb1bc8a1086dd01931ea5 Mon Sep 17 00:00:00 2001 From: David Shah Date: Sun, 15 Sep 2019 16:15:07 +0100 Subject: python: Refactor out bindings shared between ECP5 and iCE40 Signed-off-by: David Shah --- common/arch_pybindings_shared.h | 98 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 98 insertions(+) create mode 100644 common/arch_pybindings_shared.h (limited to 'common') diff --git a/common/arch_pybindings_shared.h b/common/arch_pybindings_shared.h new file mode 100644 index 00000000..b547dabf --- /dev/null +++ b/common/arch_pybindings_shared.h @@ -0,0 +1,98 @@ +// Common Python bindings #included by all arches + +readonly_wrapper>::def_wrap(ctx_cls, +"cells"); +readonly_wrapper>::def_wrap(ctx_cls, +"nets"); +readonly_wrapper>::def_wrap(ctx_cls, "net_aliases"); + +fn_wrapper_1a, +conv_from_str>::def_wrap(ctx_cls, "getNetByAlias"); +fn_wrapper_2a_v, +pass_through>::def_wrap(ctx_cls, "addClock"); +fn_wrapper_5a_v, pass_through, pass_through, pass_through, +pass_through>::def_wrap(ctx_cls, "createRectangularRegion"); +fn_wrapper_2a_v, +conv_from_str>::def_wrap(ctx_cls, "addBelToRegion"); +fn_wrapper_2a_v, conv_from_str>::def_wrap(ctx_cls, "constrainCellToRegion"); + + +fn_wrapper_1a, +conv_from_str>::def_wrap(ctx_cls, "getBelType"); +fn_wrapper_1a, +conv_from_str>::def_wrap(ctx_cls, "checkBelAvail"); +fn_wrapper_1a, +conv_from_str>::def_wrap(ctx_cls, "getBelChecksum"); +fn_wrapper_3a_v, +addr_and_unwrap, pass_through>::def_wrap(ctx_cls, "bindBel"); +fn_wrapper_1a_v>::def_wrap( + ctx_cls, "unbindBel"); +fn_wrapper_1a, +conv_from_str>::def_wrap(ctx_cls, "getBoundBelCell"); +fn_wrapper_1a, conv_from_str>::def_wrap(ctx_cls, "getConflictingBelCell"); +fn_wrapper_0a>::def_wrap(ctx_cls, +"getBels"); + +fn_wrapper_2a, +conv_from_str, conv_from_str>::def_wrap(ctx_cls, "getBelPinWire"); +fn_wrapper_1a, +conv_from_str>::def_wrap(ctx_cls, "getWireBelPins"); + +fn_wrapper_1a, +conv_from_str>::def_wrap(ctx_cls, "getWireChecksum"); +fn_wrapper_3a_v, +addr_and_unwrap, pass_through>::def_wrap(ctx_cls, "bindWire"); +fn_wrapper_1a_v>::def_wrap( + ctx_cls, "unbindWire"); +fn_wrapper_1a, +conv_from_str>::def_wrap(ctx_cls, "checkWireAvail"); +fn_wrapper_1a, +conv_from_str>::def_wrap(ctx_cls, "getBoundWireNet"); +fn_wrapper_1a, conv_from_str>::def_wrap(ctx_cls, "getConflictingWireNet"); + +fn_wrapper_0a>::def_wrap( + ctx_cls, "getWires"); + +fn_wrapper_0a>::def_wrap( + ctx_cls, "getPips"); +fn_wrapper_1a, +conv_from_str>::def_wrap(ctx_cls, "getPipChecksum"); +fn_wrapper_3a_v, +addr_and_unwrap, pass_through>::def_wrap(ctx_cls, "bindPip"); +fn_wrapper_1a_v>::def_wrap( + ctx_cls, "unbindPip"); +fn_wrapper_1a, +conv_from_str>::def_wrap(ctx_cls, "checkPipAvail"); +fn_wrapper_1a, +conv_from_str>::def_wrap(ctx_cls, "getBoundPipNet"); +fn_wrapper_1a, conv_from_str>::def_wrap(ctx_cls, "getConflictingPipNet"); + +fn_wrapper_1a, +conv_from_str>::def_wrap(ctx_cls, "getPipsDownhill"); +fn_wrapper_1a, +conv_from_str>::def_wrap(ctx_cls, "getPipsUphill"); +fn_wrapper_1a, +conv_from_str>::def_wrap(ctx_cls, "getWireAliases"); + +fn_wrapper_1a, +conv_from_str>::def_wrap(ctx_cls, "getPipSrcWire"); +fn_wrapper_1a, +conv_from_str>::def_wrap(ctx_cls, "getPipDstWire"); +fn_wrapper_1a, +conv_from_str>::def_wrap(ctx_cls, "getPipDelay"); + +fn_wrapper_1a, +pass_through>::def_wrap(ctx_cls, "getPackagePinBel"); +fn_wrapper_1a, +conv_from_str>::def_wrap(ctx_cls, "getBelPackagePin"); + +fn_wrapper_0a>::def_wrap( + ctx_cls, "getChipName"); +fn_wrapper_0a>::def_wrap(ctx_cls, +"archId"); -- cgit v1.2.3