From d3f1112580b1920cae8684d95e0c5eb65c785efe Mon Sep 17 00:00:00 2001 From: David Shah Date: Sun, 10 Jun 2018 17:20:29 +0200 Subject: Improving 5k support Signed-off-by: David Shah --- ice40/bitstream.cc | 49 +++++++++++++++++++++++++++++++++++-------------- ice40/chip.h | 5 +++++ ice40/chipdb.py | 13 +++++++++++-- ice40/icebreaker.v | 14 ++++++++------ 4 files changed, 59 insertions(+), 22 deletions(-) diff --git a/ice40/bitstream.cc b/ice40/bitstream.cc index 17b1b6cf..a6ab060f 100644 --- a/ice40/bitstream.cc +++ b/ice40/bitstream.cc @@ -181,7 +181,8 @@ void write_asc(const Design &design, std::ostream &out) input_en = true; } - if(chip.args.type == ChipArgs::LP1K || chip.args.type == ChipArgs::HX1K) { + if (chip.args.type == ChipArgs::LP1K || + chip.args.type == ChipArgs::HX1K) { set_config(ti, config.at(iey).at(iex), "IoCtrl.IE_" + std::to_string(iez), !input_en); set_config(ti, config.at(iey).at(iex), @@ -200,7 +201,8 @@ void write_asc(const Design &design, std::ostream &out) } // Set config bits in unused IO for (auto bel : chip.getBels()) { - if (chip.bel_to_cell[bel.index] == IdString() && chip.getBelType(bel) == TYPE_SB_IO) { + if (chip.bel_to_cell[bel.index] == IdString() && + chip.getBelType(bel) == TYPE_SB_IO) { TileInfoPOD &ti = bi.tiles_nonrouting[TILE_IO]; const BelInfoPOD &beli = ci.bel_data[bel.index]; int x = beli.x, y = beli.y, z = beli.z; @@ -208,7 +210,8 @@ void write_asc(const Design &design, std::ostream &out) int iex, iey, iez; std::tie(iex, iey, iez) = ieren; if (iez != -1) { - if(chip.args.type == ChipArgs::LP1K || chip.args.type == ChipArgs::HX1K) { + if (chip.args.type == ChipArgs::LP1K || + chip.args.type == ChipArgs::HX1K) { set_config(ti, config.at(iey).at(iex), "IoCtrl.IE_" + std::to_string(iez), true); set_config(ti, config.at(iey).at(iex), @@ -225,30 +228,48 @@ void write_asc(const Design &design, std::ostream &out) TileInfoPOD &ti = bi.tiles_nonrouting[tile]; // disable RAM to stop icebox_vlog crashing (FIXME) - if ((tile == TILE_RAMB) && (chip.args.type == ChipArgs::LP1K || chip.args.type == ChipArgs::HX1K)) { + if ((tile == TILE_RAMB) && (chip.args.type == ChipArgs::LP1K || + chip.args.type == ChipArgs::HX1K)) { set_config(ti, config.at(y).at(x), "RamConfig.PowerUp", true); } // set all ColBufCtrl bits (FIXME) bool setColBufCtrl = true; - if (chip.args.type == ChipArgs::LP1K || chip.args.type == ChipArgs::HX1K) { + if (chip.args.type == ChipArgs::LP1K || + chip.args.type == ChipArgs::HX1K) { if (tile == TILE_RAMB || tile == TILE_RAMT) { setColBufCtrl = (y == 3 || y == 5 || y == 11 || y == 13); } else { setColBufCtrl = (y == 4 || y == 5 || y == 12 || y == 13); } - } else if (chip.args.type == ChipArgs::LP8K || chip.args.type == ChipArgs::HX8K) { + } else if (chip.args.type == ChipArgs::LP8K || + chip.args.type == ChipArgs::HX8K) { setColBufCtrl = (y == 8 || y == 9 || y == 24 || y == 25); + } else if (chip.args.type == ChipArgs::UP5K) { + if (tile == TILE_LOGIC) { + setColBufCtrl = (y == 4 || y == 5 || y == 14 || y == 15 || + y == 26 || y == 27); + } else { + setColBufCtrl = false; + } } if (setColBufCtrl) { - set_config(ti, config.at(y).at(x), "ColBufCtrl.glb_netwk_0", true); - set_config(ti, config.at(y).at(x), "ColBufCtrl.glb_netwk_1", true); - set_config(ti, config.at(y).at(x), "ColBufCtrl.glb_netwk_2", true); - set_config(ti, config.at(y).at(x), "ColBufCtrl.glb_netwk_3", true); - set_config(ti, config.at(y).at(x), "ColBufCtrl.glb_netwk_4", true); - set_config(ti, config.at(y).at(x), "ColBufCtrl.glb_netwk_5", true); - set_config(ti, config.at(y).at(x), "ColBufCtrl.glb_netwk_6", true); - set_config(ti, config.at(y).at(x), "ColBufCtrl.glb_netwk_7", true); + set_config(ti, config.at(y).at(x), "ColBufCtrl.glb_netwk_0", + true); + set_config(ti, config.at(y).at(x), "ColBufCtrl.glb_netwk_1", + true); + set_config(ti, config.at(y).at(x), "ColBufCtrl.glb_netwk_2", + true); + set_config(ti, config.at(y).at(x), "ColBufCtrl.glb_netwk_3", + true); + set_config(ti, config.at(y).at(x), "ColBufCtrl.glb_netwk_4", + true); + set_config(ti, config.at(y).at(x), "ColBufCtrl.glb_netwk_5", + true); + set_config(ti, config.at(y).at(x), "ColBufCtrl.glb_netwk_6", + true); + set_config(ti, config.at(y).at(x), "ColBufCtrl.glb_netwk_7", + true); } } } diff --git a/ice40/chip.h b/ice40/chip.h index cedc89b6..760ef3b1 100644 --- a/ice40/chip.h +++ b/ice40/chip.h @@ -586,6 +586,11 @@ struct Chip bool checkPipAvail(PipId pip) const { assert(pip != PipId()); + if (args.type == ChipArgs::UP5K) { + int x = chip_info.pip_data[pip.index].x; + if (x == 0 || x == (chip_info.width - 1)) + return false; + } return !switches_locked[chip_info.pip_data[pip.index].switch_index]; } diff --git a/ice40/chipdb.py b/ice40/chipdb.py index a756203a..f57d307c 100644 --- a/ice40/chipdb.py +++ b/ice40/chipdb.py @@ -220,8 +220,8 @@ def add_bel_io(x, y, z): wire_cen = wire_names[(x, y, "io_global/cen")] wire_iclk = wire_names[(x, y, "io_global/inclk")] - wire_oclk = wire_names[(x, y, "io_global/latch")] - wire_latch = wire_names[(x, y, "io_global/outclk")] + wire_latch = wire_names[(x, y, "io_global/latch")] + wire_oclk = wire_names[(x, y, "io_global/outclk")] wire_din_0 = wire_names[(x, y, "io_%d/D_IN_0" % z)] wire_din_1 = wire_names[(x, y, "io_%d/D_IN_1" % z)] @@ -301,6 +301,15 @@ if dev_name == "1k": add_bel_gb( 6, 0, 5) add_bel_gb( 0, 8, 6) add_bel_gb(13, 8, 7) +elif dev_name == "5k": + add_bel_gb(13, 0, 0) + add_bel_gb(13, 31, 1) + add_bel_gb(19, 31, 2) + add_bel_gb( 6, 31, 3) + add_bel_gb(12, 31, 4) + add_bel_gb(12, 0, 5) + add_bel_gb( 6, 0, 6) + add_bel_gb(19, 0, 7) print('#include "chip.h"') diff --git a/ice40/icebreaker.v b/ice40/icebreaker.v index fde2c576..f7b788a1 100644 --- a/ice40/icebreaker.v +++ b/ice40/icebreaker.v @@ -9,7 +9,7 @@ module icebreaker ( output led4_pin, output led5_pin ); - wire clk, led1, led2, led3, led4, led5, btn1, btn2, btn3; + wire clk, clk_pre, led1, led2, led3, led4, led5, btn1, btn2, btn3; (* BEL="18_31_io1" *) //27 SB_IO #( @@ -115,7 +115,7 @@ module icebreaker ( .OUTPUT_ENABLE(), .D_OUT_0(), .D_OUT_1(), - .D_IN_0(clk), + .D_IN_0(clk_pre), .D_IN_1() ); @@ -172,7 +172,9 @@ module icebreaker ( .D_IN_0(btn3), .D_IN_1() ); - /*localparam BITS = 5; + + SB_GB clk_gb(.USER_SIGNAL_TO_GLOBAL_BUFFER(clk_pre), .GLOBAL_BUFFER_OUTPUT(clk)); + localparam BITS = 5; localparam LOG2DELAY = 22; reg [BITS+LOG2DELAY-1:0] counter = 0; @@ -181,7 +183,7 @@ module icebreaker ( always @(posedge clk) begin counter <= counter + 1; outcnt <= counter >> LOG2DELAY; - end*/ - - assign {led1, led2, led3, led4, led5} = {!btn1, btn2, btn3, btn2, btn1}; + end + assign {led1, led2, led3, led4, led5} = outcnt ^ (outcnt >> 1); + //assign {led1, led2, led3, led4, led5} = {!btn1, btn2, btn3, btn2, btn1}; endmodule -- cgit v1.2.3