Commit message (Collapse) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | Fixing old emails and names in copyrights | gatecat | 2021-06-12 | 1 | -1/+1 |
| | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
* | Using hashlib in arches | gatecat | 2021-06-02 | 1 | -32/+31 |
| | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
* | Use hashlib for core netlist structures | gatecat | 2021-06-02 | 1 | -40/+40 |
| | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
* | nexus: Use new cluster API | gatecat | 2021-05-06 | 1 | -8/+12 |
| | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
* | nexus: Support for hard DPHY | gatecat | 2021-03-08 | 1 | -1/+29 |
| | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
* | Replace DelayInfo with DelayPair/DelayQuad | gatecat | 2021-02-19 | 1 | -3/+6 |
| | | | | | | | | | | | | | | | | | This replaces the arch-specific DelayInfo structure with new DelayPair (min/max only) and DelayQuad (min/max for both rise and fall) structures that form part of common code. This further reduces the amount of arch-specific code; and also provides useful data structures for timing analysis which will need to delay with pairs/quads of delays as it is improved. While there may be a small performance cost to arches that didn't separate the rise/fall cases (arches that aren't currently separating the min/max cases just need to be fixed...) in DelayInfo, my expectation is that inlining will mean this doesn't make much difference. Signed-off-by: gatecat <gatecat@ds0.me> | ||||
* | Mark IdString and IdStringList single argument constructors explicit. | Keith Rothman | 2021-02-04 | 1 | -1/+1 |
| | | | | | | | | | Single argument constructors will silently convert to that type. This is typically not the right thing to do. For example, the nexus and ice40 arch_pybindings.h files were incorrectly parsing bel name strings, etc. Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com> | ||||
* | nexus: Implement IdStringList for all arch object names | D. Shah | 2021-02-02 | 1 | -1/+1 |
| | | | | Signed-off-by: D. Shah <dave@ds0.me> | ||||
* | cleanup: Fix compiler warnings | D. Shah | 2021-01-28 | 1 | -2/+1 |
| | | | | Signed-off-by: D. Shah <dave@ds0.me> | ||||
* | nexus: Add MULTADDSUB9X9WIDE support | David Shah | 2020-12-08 | 1 | -28/+55 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: Add support for initialised LRAM | David Shah | 2020-12-07 | 1 | -2/+5 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: Add basic LRAM support (no init) | David Shah | 2020-12-02 | 1 | -2/+55 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: Add PLL support | David Shah | 2020-12-02 | 1 | -2/+74 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: Add support for deriving timing constraints in packer | David Shah | 2020-12-02 | 1 | -0/+96 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: Preliminary integration of DSP timing data | David Shah | 2020-11-30 | 1 | -4/+58 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: Clocked MULTADDSUB36X36 fix | David Shah | 2020-11-30 | 1 | -0/+2 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: Add MULTADDSUB36X36 | David Shah | 2020-11-30 | 1 | -4/+21 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: Add MULTADDSUB18X18 support | David Shah | 2020-11-30 | 1 | -17/+65 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: ACC54 definitions | David Shah | 2020-11-30 | 1 | -0/+32 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: Add DSP pre-adder support | David Shah | 2020-11-30 | 1 | -2/+17 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: Fix DSP signed ports | David Shah | 2020-11-30 | 1 | -2/+2 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: Refactor DSP macro splitting to make it more generic | David Shah | 2020-11-30 | 1 | -29/+110 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: Add support for clocked MULT9X9s | David Shah | 2020-11-30 | 1 | -0/+36 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: Support for unclocked 9x9 multiplies | David Shah | 2020-11-30 | 1 | -13/+69 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: More DSP primitive config | David Shah | 2020-11-30 | 1 | -0/+16 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: Miscellaneous DSP infrastructure | David Shah | 2020-11-30 | 1 | -0/+48 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: Add some infrastructure for DSP packing | David Shah | 2020-11-30 | 1 | -5/+135 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: Add EBR timing analysis | David Shah | 2020-11-30 | 1 | -0/+19 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: Add LUTRAM and WIDEFN9 timing support | David Shah | 2020-11-30 | 1 | -1/+10 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | timing: Add a few more cell types | David Shah | 2020-11-30 | 1 | -1/+9 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: Add cell delay lookup | David Shah | 2020-11-30 | 1 | -0/+2 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: Use dedicated Vcc routing for OXIDE_COMB pins | David Shah | 2020-11-30 | 1 | -11/+15 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: Basic support for carries | David Shah | 2020-11-30 | 1 | -0/+96 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: Add WIDEFN9 support | David Shah | 2020-11-30 | 1 | -0/+47 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: Basic support for differential IO types | David Shah | 2020-11-30 | 1 | -0/+13 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: EBR fixes | David Shah | 2020-11-30 | 1 | -0/+2 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: EBR FASM generation | David Shah | 2020-11-30 | 1 | -0/+10 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: Add packing rules for BRAM | David Shah | 2020-11-30 | 1 | -0/+61 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: LUTRAM support | David Shah | 2020-11-30 | 1 | -3/+116 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: Promote and place global buffers | David Shah | 2020-11-30 | 1 | -8/+112 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: More global placement infrastructure | David Shah | 2020-11-30 | 1 | -0/+77 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: Bel search function for DCC placement | David Shah | 2020-11-30 | 1 | -2/+56 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: Add constant/inversion packing | David Shah | 2020-11-30 | 1 | -3/+25 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: Refactor cell pin style db | David Shah | 2020-11-30 | 1 | -23/+2 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: IO packing fix | David Shah | 2020-11-30 | 1 | -2/+15 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: Add IO packing | David Shah | 2020-11-30 | 1 | -9/+92 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: IO pre-packing | David Shah | 2020-11-30 | 1 | -0/+58 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: Lookup of package and IO pins | David Shah | 2020-11-30 | 1 | -0/+18 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: Infrastructure for constant/inv handling | David Shah | 2020-11-30 | 1 | -4/+131 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | nexus: Packing helper functions | David Shah | 2020-11-30 | 1 | -0/+86 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> |