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* machxo2: Special-case left and right I/O wire names in ASCII generation.William D. Jones2021-02-121-1/+35
* machxo2: Add quickstart README.md.William D. Jones2021-02-121-0/+73
* machxo2: Fail CMake configuration is BUILD_PYTHON is ON (not supported for now).William D. Jones2021-02-121-0/+3
* machxo2: Fix REGMODE identifier (per slice, not per-FF).William D. Jones2021-02-122-5/+2
* machxo2: Add demo.sh TinyFPGA Ax example.William D. Jones2021-02-124-1/+50
* machxo2: clang format.William D. Jones2021-02-124-29/+34
* machxo2: Fix reversed interpretation of REG_SD config bits.William D. Jones2021-02-121-6/+0
* machxo2: Add bitstream generation for OSCH.William D. Jones2021-02-121-0/+4
* machxo2: Add basic bitstream generation for PIC tiles and I/O.William D. Jones2021-02-121-0/+26
* machxo2: Add REGMODE to bitstream output.William D. Jones2021-02-121-0/+1
* machxo2: Checkpoint commit for slice bitstream generation.William D. Jones2021-02-123-1/+121
* machxo2: Write out pips to bitstream.William D. Jones2021-02-123-0/+83
* machxo2: Emit empty bitstream file.William D. Jones2021-02-121-0/+37
* machxo2: Add/fix copyright banners.William D. Jones2021-02-128-5/+12
* machxo2: Add stub bitstream writer plus support files.William D. Jones2021-02-125-2/+559
* machxo2: Tweak A-star parameters for acceptable performance.William D. Jones2021-02-122-3/+26
* machxo2: Fix getWireName.William D. Jones2021-02-121-1/+1
* machxo2: Fix typos where absolute positions were treated as relative.William D. Jones2021-02-121-6/+6
* machxo2: Finish implementing Wire API functions. nextpnr segfaults on example...William D. Jones2021-02-122-12/+43
* machxo2: Finish implementing Pip API functions.William D. Jones2021-02-122-27/+67
* machxo2: Implement 4 more Wire/Pip API functions.William D. Jones2021-02-122-32/+94
* machxo2: Add stub getAttrs API functions.William D. Jones2021-02-122-13/+21
* machxo2: Implement getByName/getName for Wires and Pips.William D. Jones2021-02-122-13/+94
* machxo2: Convert facade_import to use pybind API from pytrellis.William D. Jones2021-02-121-9/+7
* machxo2: Use attrmvcp in yosys to implement LOC constraint and only check for...William D. Jones2021-02-121-37/+22
* machxo2: Detect LOC attributes during packing to implement rudimentary user c...William D. Jones2021-02-123-0/+61
* machxo2: clang format.William D. Jones2021-02-125-74/+32
* machxo2: Import remaining iterators from ECP5.William D. Jones2021-02-121-0/+154
* machxo2: Implement WireId/PipId, complete Bel part of API.William D. Jones2021-02-123-2/+72
* machxo2: Implement all of Bel API except getBelPinWire.William D. Jones2021-02-122-12/+79
* machxo2: Fix place phase segfault. Placement suceeds with warning of no clock.William D. Jones2021-02-121-0/+2
* machxo2: Stub valid BEL functions with comment. Place phase segfaults.William D. Jones2021-02-121-2/+7
* machxo2: Implement bel_to_cell and API functions using it.William D. Jones2021-02-122-21/+47
* machxo2: Implement 2 Bel API functions.William D. Jones2021-02-122-3/+25
* machxo2: Implement General Methods.William D. Jones2021-02-122-5/+28
* machxo2: Implement getBelLocation to stop std::out_of_range in place phase.William D. Jones2021-02-122-6/+10
* machxo2: Convert uint_t to int_t in packed structs.William D. Jones2021-02-121-22/+22
* machxo2: Implement functions to get device utilization (throws std::out_of_ra...William D. Jones2021-02-123-9/+134
* machxo2: Initialize Arch context with device type and package.William D. Jones2021-02-126-14/+64
* machxo2: Add binary blob struct definitions.William D. Jones2021-02-122-1/+101
* machxo2: Clean up packing pass a bit.William D. Jones2021-02-121-5/+4
* machxo2: Finalize (hopefully) facade_import for prototype.William D. Jones2021-02-121-1/+4
* machxo2: Add package/IO info to facade_import.William D. Jones2021-02-121-2/+99
* machxo2: Import constids and BELs into facade_import.William D. Jones2021-02-122-1/+57
* machxo2: Add pip and wire info into facade_import.William D. Jones2021-02-121-0/+50
* machxo2: Begin populating binary blob via facade_import.William D. Jones2021-02-121-9/+109
* machxo2: Add SMT mode to mitertest.shWilliam D. Jones2021-02-123-12/+60
* machxo2: Rework examples to test pack, place, and route phases.William D. Jones2021-02-126-18/+145
* machxo2: Make sure REGSET FF parameter is set in FACADE_SLICE. Init blinky ct...William D. Jones2021-02-122-1/+5
* machxo2: Add LUT and FF packing functions.William D. Jones2021-02-123-5/+82