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ice40
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bitstream.cc
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Author
Age
Files
Lines
...
*
Fixing 5k bitstream gen and place heuristics
David Shah
2018-06-22
1
-1
/
+12
*
Getting rid of old IdString API users, Add ctx to many internal APIs
Clifford Wolf
2018-06-18
1
-24
/
+30
*
Rename Design to Context, derive from Arch instead of instantiating
Clifford Wolf
2018-06-18
1
-35
/
+34
*
Rename Chip to Arch and ChipArgs to ArchArgs
Clifford Wolf
2018-06-18
1
-21
/
+21
*
Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr into chipdbng
Clifford Wolf
2018-06-17
1
-1
/
+8
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\
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*
ice40: Fixing negative clock bitstream generation
David Shah
2018-06-17
1
-1
/
+8
*
|
Move top-level ChipInfoPOD into ice40 chipdb blob
Clifford Wolf
2018-06-17
1
-2
/
+2
*
|
Move BitstreamInfoPOD to ice40 chipdb blob
Clifford Wolf
2018-06-17
1
-5
/
+5
*
|
Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr into chipdbng
Clifford Wolf
2018-06-17
1
-7
/
+9
|
\
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*
General reformatting
David Shah
2018-06-17
1
-1
/
+1
|
*
ice40: Add symbol output to bitstream generation
David Shah
2018-06-17
1
-6
/
+8
|
*
Updating copyrights
David Shah
2018-06-17
1
-1
/
+1
*
|
Minor refactoring of BinaryBlobAssembler, fix alignments
Clifford Wolf
2018-06-17
1
-1
/
+1
*
|
Progress with chipdb refactoring
Clifford Wolf
2018-06-16
1
-1
/
+1
|
/
*
Update clangformat
Clifford Wolf
2018-06-16
1
-1
/
+1
*
ice40: Fix BRAM initialisation
David Shah
2018-06-16
1
-2
/
+3
*
ice40: Include RAM init data in bitstream
David Shah
2018-06-16
1
-0
/
+40
*
ice40: Fix bitstream generation when parameters are unspecified
David Shah
2018-06-16
1
-13
/
+23
*
ice40: Bitstream generation for RAM
David Shah
2018-06-16
1
-1
/
+36
*
Add nextpnr namespace
Clifford Wolf
2018-06-12
1
-0
/
+4
*
Remove pool, dict, vector namespace aliases
Clifford Wolf
2018-06-11
1
-3
/
+4
*
Improving 5k support
David Shah
2018-06-10
1
-14
/
+35
*
Add support for iCE40 global buffers (currently only for 1k devices)
Clifford Wolf
2018-06-10
1
-3
/
+28
*
Debugging on icebreaker
David Shah
2018-06-10
1
-9
/
+19
*
ice40: Set config bits for unused IO
David Shah
2018-06-10
1
-1
/
+19
*
ice40: Add IO config to bitstream
David Shah
2018-06-10
1
-12
/
+64
*
ice40: Write logic cell config to bitstream
David Shah
2018-06-10
1
-5
/
+58
*
ice40: Start adding routing to asc output
David Shah
2018-06-10
1
-0
/
+34
*
ice40: Writing an empty ASC file
David Shah
2018-06-10
1
-0
/
+99
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